NEC mPD789101 User Manual page 188

(3) UART mode cautions
(a) When bit 7 (TXE20) of asynchronous serial interface mode register 20 (ASIM20) is cleared during
transmission, be sure to set transmit shift register 20 (TXS20) to FFH, then set TXE20 to 1 before executing
the next transmission.
(b) When bit 6 (RXE20) of asynchronous serial interface mode register 20 (ASIM20) is cleared during
reception, receive buffer register 20 (RXB20) and receive completion interrupt 20 (INTSR20) are as
follows.
RxD20 Pin
RXB20
INTSR20
When RXE20 is set to 0 at a time indicated by <1>, RXB20 holds the previous data and does not generate
INTSR20.
When RXE20 is set to 0 at a time indicated by <2>, RXB20 renews the data and does not generate INTSR20.
When RXE20 is set to 0 at a time indicated by <3>, RXB20 renews the data and generates INTSR20.
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CHAPTER 13 SERIAL INTERFACE 20
Parity
User's Manual U13045EJ2V0UM00
<1> <3>
<2>