York MAXE OPTIVIEW YK Service Instructions Manual page 80

Adaptive Capacity Control Board
pen sate for an increasing load condition. Therefore, in
Auto speed control mode, if there is no Current Limit
in ef fect, and the PRV position reaches >98%, the speed
is automatically increased at a rate based on the Delta
T between the Leaving Chilled Liquid tem per a ture and
the Leaving Chilled Liquid temperature Setpoint as
fol lows:
• 0.1 Hz every 10 seconds if Delta T is >0.2 and
<0.5ºF.
• 0.1 Hz every 8 seconds if Delta T is >0.5 and
<0.9ºF.
• 0.1 Hz every 6 seconds if Delta T is >0.9ºF.
If Delta P/P ever increases to >3.60, the speed will be
slow ly increased to 60 Hz. If this were to occur, Delta
P/P would have to decrease to <3.55 before a speed
de crease would be allowed.
The microprocessor is the center point of the hardware
architecture (Fig. 42). It coordinates the serial data
com mu ni ca tions between the OptiView Control Center
Microboard and the VSD Logic Board and Harmonic
Filter Logic Board. This serial data is in 0v/+5VDC form.
YM XMT (CR7) and YM RCV (CR6) LED's illuminate
during serial communications with the OptiView Control
Center Microboard. Similarly, VS XMT (CR5) and VS
RCV (CR4) LED's illuminate dur ing serial com mu ni c-
a tions with the VSD Logic Board. Serial communications
with the Harmonic Filter logic Board take place through
the mi cro pro ces sor via the Digital Signal Processor. This
data is accompanied by a Framing pulse and a CLK sig nal.
Although Evap o ra tor and Condenser pressures are trans-
mit ted to the ACC Board via the serial com mu ni ca tions
link for Delta P/P calculation, these pressures are also
80
ap plied directly from the Microboard to the MUX (mul-
ti plex er) for Del ta P surge detection. Also ap plied to the
MUX, is the out put of the PRV position Po ten ti om e ter.
Under program con trol, these values are input to the
mi cro pro ces sor. The EPROM contains the op er at ing
Pro gram for the ACC Board. The RAM serves as the
scratch pad mem o ry. The BRAM is a battery backed
memory de vice where the Surge Map is stored. The
Watchdog circuit main tains the mi cro pro ces sor in a re-
set state dur ing low volt age conditions. This prevents
the mi cro pro ces sor from reading/writing or processing
data until it and sup port ing circuits have suffi cient sup-
ply voltage. The Watch dog also assures that the entire
Pro gram is executed and that no Pro gram latch-ups oc-
cur. Surge LED CR9 illuminates for 2 seconds when
a val id surge condition has been detected as ex plained
above. Valid Point LED CR8 illuminates when ev er
there is a con di tion in effect that prevents a Surge from
being plotted on the Surge Map. These con di tions are:
a.) Current Limit is in ef fect b.) Leaving Chilled Liq uid
Tem per a ture Stability Timer is running, in di cat ing an
un sta ble control con di tion c.) Speed con trol is in MAN-
U AL mode. Switch SW1 is used to man u al ly in sert (plot)
a surge point in the Surge Map.
Test points are provided as follows:
• TPA: +5VDC supply voltage.
• TPB: supply voltage ground.
• TPC: Watchdog power failure detected. Nor mal ly
>+4.5VDC. Transitions to logic low (<3.5VDC)
dur ing low voltage conditions.
• TPD: Harmonic Filter Logic Board 0/+5VDC 1200
baud serial data.
• TPE: Harmonic Filter Logic Board Frame pulse.
FORM 160.54-M1(503)
YORK INTERNATIONAL