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Microboard
The graphic screens that are displayed on the Liquid
Crystal Display are cre at ed from pre-formed graph ics
and mes sag es that are stored in the Program (FLASH
Mem o ry Card), and real-time system op er at ing pa-
ram e ters, such as sys tem pres sures and tem per a tures.
The graphics, mes sage and number data are in the form
of digital words. The Dis play Controller con verts this
data into display drive signals and sends them to the
Display from Microboard J5. The Display has 307,200
pixels ar ranged in a 640 columns x 480 rows matrix
con fi g u ra tion. Each pixel consists of 3 win dows; red,
green and blue, through which a variable amount of light
from the Display back light is per mit ted to pass through
the front of the dis play. Im bed ded in each win dow of
the pixel is a tran sis tor, the con duc tion of which de ter -
mines the amount of light that will pass. The drive sig nal
de ter mines the amount of conduction of the tran sis tor
and therefore the amount of light passed through the
win dow. The overall pixel color becomes a result of the
gradient of red, green and blue light allowed to pass. The
drive signal for each pixel is an 18 bit binary word; 6
for each of the 3 colors, red, green and blue. The greater
the binary value, the greater the amount of light per-
mit ted to pass. The pix els are driven se quen tial ly from
left to right, beginning with the top row. To co or di nate
the drive signals and assure the pixels in each row are
driven sequentially from left to right and the columns
are driven from top to bottom, each drive sig nal con tains
a horizontal and vertical sync signal.
The Display DRAM is a memory device that sup ports
the op er a tion of the display controller. This de vice
could be ei ther of two types; FPM (fast page mode) or
EDO (ex tend ed data out) type. Program Jump er JP6
must be positioned according to the type of DRAM
de vice in stalled in the Microboard; JP6 in - EDO,
out - FPM. Refer to Table 1, "Program Jump ers". De-
pend ing upon the re quire ment, there could be one or
two DRAM devices installed in the Microboard. If the
de sign re quires only one DRAM, it is installed in socket
U27. If an additional one is required, it is in stalled in
socket U25.
During the power-up sequence, the program in the BIOS
EPROM reads Program Jumper JP6 to determine the
type of Display DRAM installed (as explained above).
It also reads wire jumpers PID0 through PID3 (via
Microboard J5) on the Display Interface Board to
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de ter mine the man u fac tur er of the display (refer to
de scrip tion of Dis play In ter face Board). Each display
man u fac tur er re quires a slight ly different control. The
pro gram in the BIOS EPROM then confi gures the Dis-
play Con trol ler for operation with the actual display
that is present.
Revision "A" through "D" Microboards are equipped
with Display Controller (U29) type 65548. Revision "E"
and later boards could be equipped with either a 65548
or 65550 Display Controller. To ac com mo date the use of
either device, BIOS Eprom part number 031-01796-002
is required on re vi sion "E" and later Microboards. Also,
Program Jumpers JP43 and JP44 (re fer to Table 1) must
be confi gured according to the ac tu al Dis play Con trol ler
installed on the board. These jump ers are po si tioned ap-
propriately at the time the board is man u fac tured and
should not require fi eld con fi g u ra tion.
Different Display manufacturers can require different
supply and control voltages for their displays and back-
lights. Program Jumpers JP 2 through 4 and 5 through 8
must be confi gured to provide the required supply and
control voltages to the display and back light con trol.
Table 1 lists the required Program Jumper con fi g u ra tion
for each Display. Also, a label attached to the Dis play
mount ing plate lists the required Program Jumper con-
fi g u ra tion for that particular Display.
The power supply voltage that operates the Display is
pro vid ed by the Microboard J5. The position of Pro gram
Jumper JP2 determines whether this supply volt age is
+5VDC or +3.3VDC. The Display requires a spe cifi c
pow er-up and power-off sequencing to pre vent dam age.
During power-up, the supply voltage must be ap plied to
the Display before the drive signals are ap plied. Simi-
larly, during power-off sequencing, the dis play drive
signals must be removed prior to removing the supply
voltage. The Display Controller applies the sup ply volt-
age and data drive signals to the Display in the prop er
sequence. The Display Controller controls the Display
Backlight by ap ply ing con trol sig nals (from Microboard
J6) to the Backlight Inverter Board. The Backlight
Inverter Board converts low volt age DC (+12VDC
or +5VDC, de pend ing on position of Pro gram Jumper
JP5) to high voltage AC (500 to 1500VAC). This high
voltage AC is applied to the lamp to cause it to illumi-
FORM 160.54-M1(503)
YORK INTERNATIONAL
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