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10.1.2 Modes of operation
10.1.2.1 Independent Channel mode
CPU
iMC0
A
B
channel
1A
1B
# DIMMS
1
1
1
2
1
3
3
1
3
4
1
3
5
1
3
6
1
1
1
2
1
3
1
4
1
5
5
1
5
6
1
5
7
1
5
8
1
5
9
1
5
10
1
5
11
1
5
12
Figure 139: Independent channel mode
RX2520 M4
CPU 1
iMC1
C
D
E
1C
1D
1E
1F
1 CPU populated
2
2
2
4
5
2
4
5
2
4
2 CPU populated
3
3
3
3
3
7
3
7
9
3
7
9
3
7
9
3
7
11
9
3
7
11
Upgrade and Maintenance Manual
iMC0
F
G
H
1G
1H
1J
6
2
2
2
2
2
6
2
6
2
6
2
6
2
6
10
2
6
10
2
6
10
Main memory
CPU2
iMC1
J
K
L
M
1K
1L
1M
4
4
4
4
4
8
4
8
4
8
4
8
4
8
12
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