Figure 3-15. Connection Diagram For A 3-Wire Rtd Using One Idac And A Low-Side R - Texas Instruments ADS1x48EVM User Manual

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3.5.3.3 Connecting a 3-Wire RTD Using One IDAC and a Low-Side R
Figure 3-15 shows how to connect a 3-wire RTD using one IDAC and a low-side R

Figure 3-15. Connection Diagram for a 3-Wire RTD Using One IDAC and a Low-Side R

Figure 3-15 also shows that for this RTD configuration, the RTD is connected to REFP1, RTD_A, and RTD_B.
Additionally, jumpers JP3 and JP4 are connected whereas jumpers JP5 and JP6 are disconnected. Moreover,
the IEXC1 current source is enabled. Finally, this specific configuration requires two measurements for lead-
wire cancellation: the first is between AIN3 and AIN2, and the second is between AIN2 and AIN1.
summarizes the necessary connections and ADC configuration settings.
SBAU378A – SEPTEMBER 2021 – REVISED JANUARY 2022
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JP6
REFP1
REFN1
JP3
RTD_A
RTD_B
JP4
RTD_C
JP5
Copyright © 2022 Texas Instruments Incorporated
to J6 on the ADS1x48EVM
REF
configuration to J6.
REF
IDA C
AIN1
REFP1
REFN1
AIN0
IEXC2 IEXC2
AIN2
AIN3
IEXC1
ADS1x48EVM Evaluation Module
ADS1x48EVM Overview
REF
Table 3-5
21