Digital Interface; Figure 3-5. Ads1X48Evm-To-Pamboard Connections; Table 3-2. Ads1X48Evm Header Pinout And Description - Texas Instruments ADS1x48EVM User Manual

Evaluation modul
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3.4 Digital Interface

The ADS1x48 devices support the digital SPI and functional modes as detailed in the
sheet
or the
16-bit ADS1148 data
provided by the host computer and the ADS1x48EVM board uses this same 3.3-V logic level for DVDD.
Digital interface connections from the ADS1x48EVM to the PAMBoard include power, I
connection used to trigger an interrupt at the end of conversion that signifies new data are available. The digital
connections are highlighted in the silkscreen shown in
these connection points for troubleshooting the SPI communication with a logic analyzer or to attach an external
MCU to control the ADS1x48EVM without the PAMBoard.
Description
Connector
J1:1
J1:2
J1:3
3.3 V
J1:4
J1:5
J1:6
J1:7
SPI SCLK
J1:8
2
I
C SCL
J1:9
2
I
C SDA
J1:10
SBAU378A – SEPTEMBER 2021 – REVISED JANUARY 2022
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sheet. As stated in

Figure 3-5. ADS1x48EVM-to-PAMBoard Connections

Table 3-2. ADS1x48EVM Header Pinout and Description

Connector
Description
J3:21
5 V
J3:22
GND
J3:23
J3:24
J3:25
J3:26
J3:27
J3:28
J3:29
J3:30
Copyright © 2022 Texas Instruments Incorporated
Section
3.1, the PAMBoard operates at a 3.3-V logic level
Figure 3-5
and are described in detail in
Description
Connector
J4:40
J4:39
J4:38
RESET
J4:37
J4:36
J4:35
J4:34
START
J4:33
J4:32
DRDY
J4:31
ADS1x48EVM Overview
24-bit ADS1248 data
2
C, SPI, and a GPIO
Table
3-2. Use
Connector
Connector
J2:20
J2:19
J2:18
GND
J2:17
J2:16
J2:15
DIN
J2:14
DOUT/DRDY
J2:13
J2:12
SPI CS
J2:11
SPI CS
ADS1x48EVM Evaluation Module
11

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