Analog Devices ADSP-21369 EZ-KIT Lite Manual page 91

Index
core
clock rates, 2-10
frequency, 2-3
to CLKIN ratios, 2-10
voltage, 2-2
current limits, 2-7
D
DAC1-0 signals, 2-14
DAI
block diagram, 2-4
connections, 1-15, 1-16,
data transfer from codec,
disabling (SW3), 2-5,
header (P4), 2-4, 2-25
DAI16-15 pins, 1-16
DAI20-19 pins, 2-13, 2-17
DAI4 pins, 2-20
DAIP20-11 pins, 2-7
DATA31-0 pins, 2-7
data acquisition (DAQ) devices,
DB9 connectors, xi, 2-24
default configuration, of this EZ-KIT Lite,
1-3
digital
audio interface, See DAI
peripheral interface, See DPI
digital-to-analog converters (DACs), See
AD1835A
DIP switch (SW7), 1-3, 1-15, 2-13,
DMA controller, 1-12
DPI
block diagram, 2-5
connections, 1-13, 1-16,
disabling (SW2), 2-6
header (P3), 2-6, 2-25
DPI12-10 pins, 2-7, 2-12
DPI14-13 pins, 1-16, 2-7
I-2
2-16
1-14
2-11
1-13
2-17
2-16
ADSP-21369 EZ-KIT Lite Evaluation System Manual
DPI2-1 (MOSI-0) pins, 1-13,
DPI3 (SPI clock) pins, 1-12,
DPI4 pins, 1-15, 2-7
DPI5 (chip select) pins, 1-12,
DPI8-6 pins, 1-16, 2-7
E
electret microphone, 1-15,
ELVIS (Educational Laboratory Virtual
Instrumentation Suite)
interface, 1-13
programmable flag jumper (JP4),
select jumper (JP2),
trigger pins, 2-20
voltage select jumper (JP3),
EPROM/flash boot mode,
evaluation license
CCES, 1-10
example programs, 1-17
expansion interface, 2-3, 2-5, 2-6, 2-7,
external
memory, 1-12
phase lock loop, See PLL
ports, 2-3, 2-10
F
features, of this EZ-KIT Lite,
FLAG0-1 pins, 1-16, 2-6, 2-7, 2-13,
FLAG2 pins, 2-6, 2-7
FLAG3 pins, 1-17, 2-6, 2-7,
FLAG registers, 1-16
flash memory
boot mode (default),
start/end addresses, 1-12
via external port, 1-11,
frame sync/clock signals, 1-15,
FUNCT_OUT signals,
2-7
2-7
2-7
2-12
2-20
2-19
2-20
2-3
2-22
x
2-17
2-16
2-10
2-3
2-11
2-15