Chapter 6. Usb And Pci Express; Table 6-1. Jetson Tx2 Nx Usb 2.0 Pin Descriptions; Table 6-2. Jetson Tx2 Nx Usb 3.0 And Pcie Pin Descriptions - Nvidia Jetson TX2 NX Manual

Table of Contents

Advertisement

Chapter 6. USB and PCI Express

Jetson TX2 NX allows multiple USB 2.0, USB 3.0 and PCIe interfaces to be brought out of the
module.
Table 6-1.
Jetson TX2 NX USB 2.0 Pin Descriptions
Pin #
Module Pin Name
Tegra X2 Signal
87
GPIO00
USB_VBUS_EN0
109
USB0_D_N
USB0_DN
111
USB0_D_P
USB0_DP
115
USB1_D_N
USB1_DN
117
USB1_D_P
USB1_DP
121
USB2_D_N
USB2_DN
123
USB2_D_P
USB2_DP
Notes:
1.
In the Type/Dir column, Output is from Jetson TX2 NX. Input is to Jetson TX2 NX. Bidir is for Bidirectional signals.
2.
The direction of GPIO00 is true when used for this function. Otherwise as a GPIO, the direction is bidirectional.
Table 6-2.
Jetson TX2 NX USB 3.0 and PCIe Pin Descriptions
Jetson TX2 NX
Pin #
Module Pin Name
Function
131
PCIE0_RX0_N
PCIE0_RX0_N
133
PCIE0_RX0_P
PCIE0_RX0_P
137
PCIE0_RX1_N
PCIE0_RX1_N
139
PCIE0_RX1_P
PCIE0_RX1_P
149
PCIE0_RX2_N
RSVD
151
PCIE0_RX2_P
RSVD
PCIE0_RX3_N
155
RSVD
(RSVD)
PCIE0_RX3_P
157
RSVD
(RSVD)
179
PCIE_WAKE*
PCIE_WAKE*
181
PCIE0_RST*
PCIE0_RST*
134
PCIE0_TX0_N
PCIE0_TX0_N
136
PCIE0_TX0_P
PCIE0_TX0_P
140
PCIE0_TX1_N
PCIE0_TX1_N
142
PCIE0_TX1_P
PCIE0_TX1_P
NVIDIA Jetson TX2 NX
Usage/Description
GPIO #0 (USB 0 VBUS Detect)
USB 2.0 Port 0 Data
USB 2.0 Port 1 Data
USB 2.0, Port 2 Data
Tegra X2 Signal
Usage/Description
PEX_RX4N
PCIe #0 Receive 0 (PCIe Ctrl #0
Lane 0)
PEX_RX4P
PEX_RX2N
PCIe #0 Receive 1 (PCIe Ctrl #0
Lane 1)
PEX_RX2P
-
Reserved
-
Reserved
Reserved
Reserved
PCIe Wake. 47kΩ pull-up to
PEX_WAKE_N
3.3V on the module.
PCIe #0 Reset (PCIe Ctrl #0).
PEX_L0_RST_N
4.7kΩ pull-up to 3.3V on the
module.
PEX_TX4N
PCIe #0 Transmit 0 (PCIe Ctrl
#0 Lane 0)
PEX_TX4P
PEX_TX2N
PCIe #0 Transmit 1PCIe Ctrl #0
Lane 1)
PEX_TX2P
Usage on DevKit
Direction Pin Type
Carrier Board
USB 2.0 Micro B
Input
USB 2.0 Micro B
Bidir
USB Hub
Bidir
M.2 Key E
Bidir
Usage on DevKit
Direction Pin Type
Carrier Board
M.2 Key M
Input
M.2 Key M
-
M.2 Key M
-
M.2 Key M
M.2 Key M
M.2 Key E & M
Input
M.2 Key M
Output
M.2 Key M
M.2 Key M
DG-10141-001_v1.1 | 16
Open Drain, 1.8V
USB PHY
USB PHY
USB PHY
PCIe PHY
-
-
Open Drain 3.3V
Open Drain 3.3V
PCIe PHY

Advertisement

Table of Contents
loading

Table of Contents