Pin # Module Pin Name
C33
GND
C34
DSI1_D0+
C35
DSI1_D0–
C36
GND
C37
DP1_TX1–
C38
DP1_TX1+
C39
GND
C40
PEX2_TX+
C41
PEX2_TX–
C42
GND
C43
USB_SS0_TX+
C44
USB_SS0_TX–
C45
GND
C46
PEX2_CLKREQ#
C47
PEX1_CLKREQ#
C48
PEX0_CLKREQ#
C49
PEX0_RST#
C50
RSVD
D1
RSVD
D2
RSVD
D3
RSVD
D4
RSVD
D5
UART7_RX
D6
I2C_CAM_DAT
D7
GPIO5_CAM_FLASH_EN
D8
UART7_TX
D9
UART1_TX
D10
UART1_RX
D11
RSVD
D12
RSVD
D13
I2S1_LRCLK
D14
I2S1_SDOUT
D15
I2C_GP0_DAT
D16
AO_DMIC_IN_DAT
D17
CAN1_RX
D18
CAN0_RX
D19
CAN0_TX
D20
GND
D21
CSI5_CLK–
D22
CSI5_CLK+
D23
GND
D24
CSI3_CLK–
D25
CSI3_CLK+
D26
GND
D27
CSI1_CLK–
D28
CSI1_CLK+
D29
GND
D30
DSI3_CLK+
D31
DSI3_CLK–
D32
GND
D33
DSI1_CLK+
D34
DSI1_CLK–
D35
GND
D36
DP1_TX2–
D37
DP1_TX2+
D38
GND
D39
PEX_RFU_TX+
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
Tegra Signal
Usage/Description
−
GND
DSI_B_D0_P
Display, DSI 1 Data 0+
DSI_B_D0_N
Display, DSI 1 Data 0–
−
GND
HDMI_DP1_TXDN1
DisplayPort 1 Lane 1– or HDMI Lane 1–
HDMI_DP1_TXDP1
DisplayPort 1 Lane 1+ or HDMI Lane 1+
−
GND
PCIe 2 Transmit+ (PCIe IF #0 Lane 2 or
PEX_TX3P
PCIe IF #1 Lane 0)
PCIe 2 Transmit– (PCIe IF #0 Lane 2 or
PEX_TX3N
PCIe IF #1 Lane 0)
−
GND
USB SS 0 Transmit+ (USB 3.0 Port #0
PEX_TX0P
muxed w/PCIe #2 Lane 0)
USB SS 0 Transmit– (USB 3.0 Port #0
PEX_TX0N
muxed w/PCIe #2 Lane 0)
−
GND
PEX_L1_CLKREQ_N
PCIE 2 Clock Request (PCIe IF #1)
PCIE 1 Clock Request (mux option - PCIe
PEX_L2_CLKREQ_N
IF #2)
PEX_L0_CLKREQ_N
PCIE 0 Clock Request (PCIe IF #0)
PEX_L0_RST_N
PCIe 0 Reset (PCIe IF #0)
−
Not used
−
Not used
−
Not used
−
Not used
−
Not used
UART7_RX
UART 7 Receive
CAM_I2C_SDA
Camera I2C Data
UART5_RTS_N
Camera Flash Enable or GPIO
UART7_TX
UART 7 Transmit
UART3_TX
UART 1 Transmit
UART3_RX
UART 1 Receive
−
Not used
−
Not used
DAP2_FS
I2S Audio Port 1 Left/Right Clock
DAP2_DOUT
I2S Audio Port 1 Data Out
GPIO_SEN9
General I2C 0 Data
CAN_GPIO0
Digital Mic Input Data
CAN1_DIN
CAN 1 Receive
CAN0_DIN
CAN 0 Receive
CAN0_DOUT
CAN 0 Transmit
−
GND
CSI_F_CLK_N
Camera, CSI 5 Clock–
CSI_F_CLK_P
Camera, CSI 5 Clock+
−
GND
CSI_D_CLK_N
Camera, CSI 3 Clock–
CSI_D_CLK_P
Camera, CSI 3 Clock+
−
GND
CSI_B_CLK_N
Camera, CSI 1 Clock–
CSI_B_CLK_P
Camera, CSI 1 Clock+
−
GND
DSI_D_CLK_P
Display DSI 3 Clock+
DSI_D_CLK_N
Display DSI 3 Clock–
−
GND
DSI_B_CLK_P
Display DSI 1 Clock+
DSI_B_CLK_N
Display DSI 1 Clock–
−
GND
HDMI_DP1_TXDN0
DisplayPort 1 Lane 2– or HDMI Lane 0–
HDMI_DP1_TXDP0
DisplayPort 1 Lane 2+ or HDMI Lane 0+
−
GND
PCIe RFU Transmit+ (PCIe IF #0 Lane 3 or
PEX_TX1P
USB 3.0 Port #1)
NVIDIA Jetson TX2/TX2i OEM Product Design Guide
Usage on the Carrier
Direction
Board
GND
−
Output
Display Connector
Output
GND
−
Output
HDMI Type A Conn.
Output
GND
−
Output
PCIe x4 Connector
Output
GND
−
Output
USB 3.0 Type A
Output
GND
−
Unassigned
Bidir
M.2 Key E
Bidir
Bidir
PCIe x4 Connector
Output
−
−
−
−
−
−
−
−
−
−
Not Assigned
Input
Camera Connector
Bidir
Output
Not Assigned
Output
Output
Serial Port Header
Input
−
−
−
−
Bidir
GPIO Expansion
Header
Bidir
I2C (General)
Bidir
Input
Input
GPIO Expansion
Header
Input
Output
GND
−
Input
Camera Connector
Input
GND
−
Input
Camera Connector
Input
GND
−
Input
Camera Connector
Input
GND
−
Output
Display Connector
Output
GND
−
Output
Display Connector
Output
GND
−
Output
HDMI Type A Conn.
Output
GND
−
PCIe x4 Connector
Output
Pin Type
GND
MIPI D-PHY
GND
AC-Coupled on carrier
board
GND
PCIe PHY, AC-Coupled on
carrier board
GND
USB SS PHY, AC-Coupled on
carrier board
GND
Open Drain 3.3V, Pull-up on
the module
−
−
−
−
−
CMOS – 1.8V
Open Drain – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
−
−
CMOS – 1.8V
CMOS – 1.8V
Open Drain – 1.8V
CMOS – 1.8V
CMOS 3.3V
CMOS 3.3V
CMOS 3.3V
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
AC-Coupled on carrier
board
GND
PCIe PHY, AC-Coupled on
carrier board
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