Main Power Sources/Supplies; Power Sequencing - Nvidia Jetson TX2 Manual

3.2 Main Power Sources/Supplies

The figure below show s the pow er connections used on the carrier board, including the DC Jack w hich connects to the AC/DC
adapter, and the main 5.0V, 3.3V and 1.8V supplies. Also show n are the pow er control signals that are used to enable these
supplies, or are used to communicate pow er sequence information to the module or other circuitry on the carrier board (i.e.
discharge circuits).
Figure 2. Main Power Source/Supply Connections
DC Jack
Blue – P2597_B04 Carrier Board
From On/Off
MOD_VIN_EN
Controller
S FET
Red – P2597_C02
(TX2/TX2i)
S FET
Carrier Board
From CARRIER_PWR_ON
Jetson TX2
From Main
VDD_5V0_IO_SYS
5V supply
Note
The figure above is a high-level representation of the connections involved. Refer to the latest carrier board
-
reference design for details.
When connecting the main power, the ground must make connection before the main power rail.
-

3.3 Power Sequencing

In order to ensure reliable and consistent pow er up sequencing, the pins VIN_PWR_BAD#, CARRIER_PWR_ON, and
RESET_OUT# on the module connector should be connected and used as described below :
VIN_PWR_BA D# signal is generated by the Carrier Board and passed to the module to keep the Tegra processor pow ered off
until the VDD_IN supply is stable and it is possible to pow er up any standby circuits on the module. This signal prevents the
Tegra processor from pow ering up prematurely before the Carrier Board has charged up its decoupling capacitors and pow er to
the module is stable
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
S
PWR
G
FET
D
S
PWR
G
FET
5V
D
G
D
G G
S FET
D D
VDD_19V_IN (TX2: 5.5V-19.6V)
G
S FET
D
U31
TPS53015
DC-DC
VIN SW
EN PG
3V3_SYS_BUCK_EN
U16
TPS53015
DC-DC
VIN SW
VDD_3V3_SYS_PG
EN PG
1V8_IO_VREG_EN
U9
APW8805
OpenVReg
VIN SW
VCC
EN/FS PGOOD
NVIDIA Jetson TX2/TX2i OEM Product Design Guide
(TX2i: 9.0V-19.0V)
VIN_PWR_BAD# To Jetson TX2 & Power
Discharge Circuitry
VDD_MOD
To Jetson TX2 VDD_IN
Main Carrier
VDD_5V0_IO_SYS
Board 5V Supply
VDD_3V3_SYS Main Carrier Board
3.3V Supply
Main 3.3V Power Good –
Routed to Power LED on
Carrier board
Main Carrier Board
VDD_1V8
1.8V Supply
Main 3.3V Power Good –
1V8_IO_PG
Routed to Power LED on
Carrier board
To Jetson TX2 (RESET_OUT#)
RESET_OUT#
to keep Tegra in Reset until
1.8V rail Valid
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