Nvidia Jetson TX2 Manual page 48

Parameter
Dimension Min A Spacing
Min B, C Length
Min Jog Width
Topology
The main-route via dimensions should comply with the via structure rules (See Via section)
For the connector pin vias, follow the rules for the connector pin vias (See Via section)
The traces after main-route via should be routed as 100Ω differential or as uncoupled 50ohm
Single-ended traces on PCB Top or Bottom.
Max distance from R to main
PD
trace (seg B)
Max distance from AC cap to RPD
stubbing point (seg A)
Max distance between ESD and
signal via
Add-on Components
Example of a case where space is
limited for placing components.
AC Cap
Value
Max via distance from BGA
Location
Placement PTH design
Micro-Via design
Void
Pull-down Resistor (R ), choke/FET
PD
Value
Location.
Layer of placement
Choke betwee n R & FET
PD
Max Trace Rdc
Max Trace length
Void
Common-Mode Choke (Stuffing option – not added unless EMI issue is seen)
Common-mode
impedance @ 100MHz
R
DC
Differential TDR impedance
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
Requirement
4x
1.5x
3x
1
~0
3
0.1
7.62 (52.5)
must be placed before pull-down resistor
Place cap on bottom layer if main-route above core
Place cap on top layer if main-route below core
Not Restricted
GND (or PWR) void under/above the cap is needed.
Void size = SMT area + 1x dielectric height keepout
distance
500
Must be placed after AC cap
Same layer as AC cap. The FET & choke can be placed
on the opposite layer thru a PTH via
Choke 600 or
1
≤20
4
GND/PWR void under/above cap is preferred
Min 65
Max 90
<=0.3ohm
90ohm +/-15% @
Tr=200ps (10%-90%)
Units Notes
Trace width
S1 must be taken care in order to
consider Xtalk to adjacent pair
mm
mm
mm
Top
uF
mm (ps)
The distance between the AC cap and the HDMI
connector is not restricted.
Ω
Ω@100MHz Can be choke or Trace. Recommended option for
uH@DC-100MHz HDMI2.0 HF1-9 improvement.
mΩ
mm
Ω
NVIDIA Jetson TX2/TX2i OEM Product Design Guide
See topology figure above table
Bottom
TDK ACM2012D-900-2P
48