Nvidia Jetson TX2 Manual page 99

Pin # Module Pin Name
D40 PEX_RFU_TX–
D41 GND
D42 USB_SS1_TX+
D43 USB_SS1_TX–
D44 GND
D45 SATA_TX+
D46 SATA_TX–
D47 SATA_DEV_SLP
D48 PEX_WAKE#
D49 PEX2_RST#
D50 RSVD
E1 FORCE_RECOV#
E2 SLEEP#
E3 SPI0_CLK
E4 SPI0_MISO
E5 I2S3_SDIN
E6 I2S3_CLK
E7 CAM2_MCLK
E8 CAM_VSYNC
E9 UART1_RTS#
E10 UART1_CTS#
E11 RSVD
E12 RSVD
E13 RSVD
E14 SPI1_CS0#
E15 I2C_GP0_CLK
E16 AO_DMIC_IN_CLK
E17 RSVD
E18 CAN0_ERR
E19 GND
E20 CSI5_D1–
E21 CSI5_D1+
E22 GND
E23 CSI3_D1–
E24 CSI3_D1+
E25 GND
E26 CSI1_D1–
E27 CSI1_D1+
E28 GND
E29 DSI3_D1+
E30 DSI3_D1–
E31 GND
E32 DSI1_D1+
E33 DSI1_D1–
E34 GND
E35 DP1_TX3–
E36 DP1_TX3+
E37 GND
E38 DP1_TX0–
E39 DP1_TX0+
E40 GND
E41 PEX1_TX+
E42 PEX1_TX–
E43 GND
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
Tegra Signal Usage/Description
PCIe RFU Transmit – (PCIe IF #0 Lane 3
PEX_TX1N
or USB 3.0 Port #1)
− GND
USB SS 1 Transmit+ (USB 3.0 Port #2 or
PEX_TX2P
PCIe IF #0 Lane 1)
USB SS 1 Transmit– (USB 3.0 Port #2 or
PEX_TX2N
PCIe #0 Lane 1)
− GND
PEX_TX5P SATA Transmit+
PEX_TX5N SATA Transmit–
SATA Device Sleep or PEX1_CLKREQ#
PEX_L2_CLKREQ_N
(PCIe IF #2) depending on Mux setting
PEX_WAKE_N PCIe Wake
PEX_L1_RST_N PCIe 2 Reset (PCIe IF #1)
− Not used
GPIO_SW1 Force Recovery strap pin
Sleep Request to the module from the
GPIO_SW2 carrier board. An internal Tegra pull-up
is present on the signal.
GPIO_SEN1 SPI 0 Clock
GPIO_SEN2 SPI 0 Master In / Slave Out
DAP4_DIN I2S Audio Port 3 Data In
DAP4_SCLK I2S Audio Port 3 Clock
GPIO_CAM2 Camera 2 Master Clock
QSPI_IO1 Camera Vertical Sync
UART3_RTS UART 1 Request to Send
UART3_CTS UART 1 Clear to Send
− Not used
− Not used
− Not used
GPIO_CAM7 SPI 1 Chip Select 0
GPIO_SEN8 General I2C 0 Clock
CAN_GPIO1 Digital Mic Input Clock
− Not used
CAN_GPIO5 CAN 0 Error
− GND
CSI_F_D1_N Camera, CSI 5 Data 1–
CSI_F_D1_P Camera, CSI 5 Data 1+
− GND
CSI_D_D1_N Camera, CSI 3 Data 1–
CSI_D_D1_P Camera, CSI 3 Data 1+
− GND
CSI_B_D1_N Camera, CSI 1 Data 1–
CSI_B_D1_P Camera, CSI 1 Data 1+
− GND
DSI_D_D1_P Display, DSI 3 Data 1+
DSI_D_D1_N Display, DSI 3 Data 1–
− GND
DSI_B_D1_P Display, DSI 1 Data 1+
DSI_B_D1_N Display, DSI 1 Data 1–
− GND
HDMI_DP1_TXDN3 DisplayPort 1 Lane 3– or HDMI Clk Lane–
HDMI_DP1_TXDP3 DisplayPort 1 Lane 3+ or HDMI Clk Lane+
− GND
HDMI_DP1_TXDN2 DisplayPort 1 Lane 0– or HDMI Lane 2–
HDMI_DP1_TXDP2 DisplayPort 1 Lane 0+ or HDMI Lane 2+
− GND
PCIe 1 Transmit+ (PCIe #2 Lane 0 muxed
PEX_TX0P
w/USB 3.0 Port #0)
PCIe 1 Transmit– (PCIe #2 Lane 0 muxed
PEX_TX0N
w/USB 3.0 Port #0)
− GND
NVIDIA Jetson TX2/TX2i OEM Product Design Guide
Usage on the Carrier
Direction
Board
Output
GND −
Output
PCIe x4 Connector
Output
GND −
Output
Output
SATA Connector
Input
PCIe x4 conn & M.2 Input
Unassigned Output
− −
System Input
Sleep (VOL DOWN)
Input
button
Bidir
Display Connector
Bidir
Input
Camera Connector
Bidir
Output
Output
Output
Serial Port Header
Input
− −
− −
− −
Expansion Header Bidir
I2C (General) Bidir
Expansion Header Output
− −
GPIO Expansion
Input
Header
GND −
Input
Camera Connector
Input
GND −
Input
Camera Connector
Input
GND −
Input
Camera Connector
Input
GND −
Output
Display Connector
Output
GND −
Output
Display Connector
Output
GND −
Output
HDMI Type A Conn.
Output
GND −
Output
HDMI Type A Conn.
Output
GND −
Output
USB 3.0 Type A
(Default) or M.2 Key E
Output
GND −
Pin Type
GND
USB SS PHY, AC-Coupled on
carrier board
GND
SATA PHY, AC-Coupled on
carrier board
Open Drain 3.3V, Pull-up on
the module
Open Drain 3.3V, Pull-up on
the module
−
CMOS – 1.8V
CMOS – 1.8V (see note 3)
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
−
−
−
CMOS – 1.8V
Open Drain – 1.8V
CMOS – 1.8V
−
CMOS 3.3V
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
AC-Coupled on carrier
board
GND
AC-Coupled on carrier
board
GND
PCIe PHY, AC-Coupled on
carrier board
GND
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