Nvidia Jetson TX2 Manual page 12

CARRIER_PWR_ON signal is generated by the module and passed to the Carrier Board to indicate that the module is pow ered
up and that the pow er up sequence for the Carrier Board circuits can begin.
RESET_OUT# is de-asserted by the Carrier Board after a period sufficient to allow the Carrier Board circuits to pow er up.
Figure 3. Power Up Sequence – Power-Button Case (Jetson TX2i in P2597_C02)
VIN_PWR_BAD#
POWER_BTN#
Jetson module System Power (Main 1.8V
rail most IF pins are associated with)
CARRIER_PWR_ON
Carrier Board VDD_1V8 (note 1)
RESET_OUT# (note 2)
Note:
The 1.8V supply on the carrier board associated with MPIO pins common to the module must not be enabled unless the
1.
module main 1.8V rail is on. In addition, the carrier board should keep RESET_OUT# lo w until this 1.8V supply is valid.
On the P2597, this is accomplished by connecting the VDD_1V8 supply PGOOD signal to RESET_OUT#.
Inactive when both PMIC Reset is inactive (high) & VDD_1V8 PGOOD is active (high)
2.
During run time if any module I/O rail is switched OFF or ON, the following sequences should be performed. Violating
3.
these sequences will result in extra in-rush current during the rail transition.
-
OFF Sequence: The associated NO_IOPOWER bit in the PMC APBDEV_PMC_NO_IOPOWER_0 register must be enabled before the
I/O Rail is powered OFF
-
ON Sequence. After an I/O Rail is powered ON, the associated NO_IOPOWER bit in the PMC APBDEV_PMC_NO_IOPOWER_0
register needs to be cleared to the "disable" state
Table 7. Power Up Sequence Timing Relationships
Timing Parameter
VDD_IN On to POWER_BTN# Pull-up (PMIC) active
t
1-2
t VDD_IN On to VIN_PWR_BAD# inactive
2-3
VIN_PWR_BAD# inactive to POWER_BTN# active
t
3-4
POWER_BTN# active time
t
4-5
t POWER_BTN# active to CARRIER_PWR_ON active
4-6
Module System Power On to CARRIER_PWR_ON
t
5-6
CARRIER_PWR_ON active to Carrier Board System Power Enabled
t
6-7
CARRIER_PWR_ON to On-Module PMIC Reset Inactive
t
6-8
RESET_IN# active time
Note:
Measured from VDD_IN ramp start to POWER_BTN# ramp start. Carrier board dependent.
1.
Typical value using NVIDIA P2597, measured from VDD_IN ramp start to VIN_PWR_BAD# inactive start. Carrier board
2.
dependent.
User Dependent if POWER_BTN# connected to button. Otherwise, carrier board dependent.
3.
Typical value measured using NVIDIA P2597. Carrier board dependent
4.
Typical value using P2597. Carrier board dependent.
5.
User Dependent if RESET_IN# connected to button. Otherwise, carrier board dependent. Not shown in Power up
6.
sequence figure.
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
1 2
VDD_IN
3 4 5
Min
0
50
0
50
NVIDIA Jetson TX2/TX2i OEM Product Design Guide
6 7 8
Typ Max Units
8.8 ms
54 ms
See Notes ms
ms
38.6 ms
8 ms
6.6 ms
77.4 ms
ms
Notes
1
2
3
3
4
5
6
12