Pcm Interface - Quectel RM510Q-GL Hardware Design

RESET_N
RFFE_VIO_1V8
PCIE_CLKREQ_N
PCIE_RST_N
PCIE_REFCLK
Table 18: PCIe Power-up Timing of Module
Symbol Min.
T 0m s
power-on
T -
turn-on
T 90 ms
FCPO#-CLKREQ#
T 100 ms
FCPO#-PERST#
100 μs
T
PERST#-CLK

4.4. PCM Interface

The following table shows the pin definition of PCM interface which can be applied to audio codec design.
Table 19: Pin Definition of PCM Interface
Pin No. Pin Name
20 PCM_CLK
22 PCM_DIN
24 PCM_DOUT
28 PCM_SYNC
RM510Q-GL_Hardware_Design
Module power-on or insertion detection
VCC
System turn-on and booting
FCPO#
T > 90 ms
FCPO#-CLKREQ#
T T
power-on turn-on
Figure 21: PCIe Power-up Timing of the Module
Typ. Max.
20 ms -
68 ms -
100 ms -
- -
- -
I/O Description
DI, PD PCM data bit clock
DI, PD PCM data input
DO, PD PCM data output
DI,PD PCM data frame sync
RM510Q-GL Hardware Design
3.7 V
1.5 V
≥ 1.19 V
V
IH
1.8 V
T > 100 ms
FCPO#-PERST#
T > 100 us
PERST#-CLK
Comment
System power-on time.
It is depend on host device.
System turn-on time
Power valid to CLKREQ# output active
Power valid to PERST# input inactive
REFCLK stable before PERST# inactive
5G Module Series
DC Characteristics
1.8 V
1.8 V
1.8 V
1.8 V
45 / 88