Boot Configuration; Boot Mode Selection; Boot Pin Connection; Table 1 - ST STM32F10 Series Application Note

AN2586 - Application note
3

Boot configuration

3.1

Boot mode selection

In the STM32F10xxx, three different boot modes can be selected by means of the
BOOT[1:0] pins as shown in

Table 1.

BOOT mode selection pins
BOOT1
x
0
1
This selection aliases the physical memory associated with each boot mode to Block 000
(boot memory). The values on the BOOT pins are latched on the 4
after a reset. It is up to the user to set the BOOT1 and BOOT0 pins after reset to select the
required boot mode.
The BOOT pins are also re-sampled when exiting the Standby mode. Consequently, they
must be kept in the required Boot mode configuration in the Standby mode.
Even when aliased in the boot memory space, the related memory (Flash memory or
SRAM) is still accessible at its original memory space.
After this startup delay has elapsed, the CPU starts code execution from the boot memory,
located at the bottom of the memory address space starting from 0x0000_0000.
3.2

Boot pin connection

Figure 11
STM32F10xxx.

Figure 11. Boot mode selection implementation example

1. Resistor values are given only as a typical example.
Table
Boot modes
BOOT0
0
1
1
shows the external connection required to select the boot memory of the
V
DD
1.
Boot mode
User Flash memory
System memory
Embedded SRAM
STM32F10xxx
10 kΩ
BOOT0
V
DD
10 kΩ
BOOT1
Boot configuration
Aliasing
User Flash memory is selected as boot
space
System memory is selected as boot
space
Embedded SRAM is selected as boot
space
th
rising edge of SYSCLK
ai14373
15/23