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Flat Panel Display Interface Pin Descriptions
Mono
Mono
Mono
65550
SS
DD
DD
Pin#
Pin
8-bit
8-bit
16-bit 9/12/16
Name
71
P0
--
UD3
UD7
72
P1
--
UD2
UD6
73
P2
--
UD1
UD5
74
P3
--
UD0
UD4
75
P4
--
LD3
UD3
76
P5
--
LD2
UD2
78
P6
--
LD1
UD1
79
P7
--
LD0
UD0
81
P8
P0
--
LD7
82
P9
P1
--
LD6
83
P10
P2
--
LD5
84
P11
P3
--
LD4
85
P12
P4
--
LD3
86
P13
P5
--
LD2
87
P14
P6
--
LD1
88
P15
P7
--
LD0
90
P16
--
--
--
91
P17
--
--
--
92
P18
--
--
--
93
P19
--
--
--
94
P20
--
--
--
95
P21
--
--
--
96
P22
--
--
--
97
P23
--
--
--
67
FLM
FLM
FLM
FLM
68
LP
LP
LP
LP
69
MDE
M
M
M
70
ShfClk ShfClk ShfClk ShfClk ShfClk ShfClk ShfClk ShfClk ShfClk ShfClk ShfClk ShfClk
Pixels/
8
8
16
Clock
NOTE: The higher order output lines should be used when only 9 or 12
bits are needed from the 9/12/16-bit TFT interface, or when
only 18 bits are needed from the 18/24-bit TFT or TFT HR
interfaces. The lower order bits should be left unconnected.
CI5TTV User's Manual
Chapter 2 Installations
Color
Color
Color
Color
Color
Color
STN
TFT
TFT
TFT
STN SS STN SS
HR
18/24
18/24
8-bit
16-bit
bit
bit
bit
(X4bP)
(4bP)
(4bP)
B0
B0
B00
R1
R1
B1
B1
B01
B1
G1
B2
B2
B02
G2
B1
B3
B3
B03
R3
R2
B4
B4
B10
B3
G2
G0
B5
B11
G4
B2
G1
B6
B12
R5
R3
G2
B7
B13
B5
G3
G3
G0
G00
Shfclku
B3
G4
G1
G01
--
R4
G5
G2
G02
--
G4
R0
G3
G03
--
B4
R1
G4
G10
--
R5
R2
G5
G11
--
G5
R3
G6
G12
--
B5
R4
G7
G13
--
R6
--
R0
R00
--
--
--
R1
R01
--
--
--
R2
R02
--
--
--
R3
R03
--
--
--
R4
R10
--
--
--
R5
R11
--
--
--
R6
R12
--
--
--
R7
R13
--
--
FLM
FLM
FLM
FLM
FLM
LP
LP
LP
LP
LP
M
M
M
M
M
1
1
2
2-2/3
5-1/3
Color
Color
STN
STN
STN
DD
DD
DD
8-bit
16-bit
24-bit
(4bP)
UR1
UR0
UR0
UG1
UG0
UG0
UB1
UB0
UB0
UR2
UR1
LR0
LR1
LR0
LG0
LG1
LG0
LB0
LB1
LB0
UR1
LR2
LR1
UG1
--
UG1
UB1
--
UB1
LR1
--
UR2
LG1
--
UG2
LB1
--
LG1
UR2
--
LB1
UG2
--
LR2
UB2
--
LG2
LR2
--
--
LG2
--
--
LB2
--
--
UR3
--
--
UG3
--
--
UB3
--
--
LR3
--
--
LG3
--
--
LB3
FLM
FLM
FLM
LP
LP
LP
M
M
M
2-2/3
5-1/3
8
25
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