Owon TAO3000 Series User Manual page 47

Source
Adr
Format
When
Dat
Format
Mode
Holdoff
3. SPI Trigger
4.Advanced User Guidebook
SCL Set SCL.
SDA Set SDA.
Trigger when SDA data transitions from
Start
high to low while SCL is high.
When another start condition occurs
Restart
before a stop condition.
Trigger when SDA data transitions from
Stop
low to high while SCL is high.
Trigger when SDA data is high during
Ack Lost any acknowledgement of SCL clock
position.
Trigger on the read or write bit when the
Addr
preset address is met.
Addr
Set Address Bits to be "7", "8" or "10".
Bits
Set address according to the preset
Addr address bits, address range is 0-127,
0-255, 0-1023 respectively.
Set Data Direction to be Write or Read.
Direction Note: The set is not available when
Address bits is set to "8".
Search for the preset data value on SDA
Data and trigger on the dump edge of SCL of
the last bit of the data area.
Byte Set data byte length, available range 1-5
Length bytes. Click
Current Select the data bit, ranges from 0 to (byte
Bit length*8 -1).
Data Set data to be H, L, or X (H or L)
Set all the data bits to be the specified
All Bits
value in Data
Trigger
Addr/Data
conditions are met at the same time.
Auto Acquire waveform even no trigger
occurred
Normal Acquire waveform when trigger occurred
Single When trigger occurs, acquire one
waveform then stop
or
when Address
41
to set byte length.
and Data