[Canxcdr](Change Data Request Register); [Canxrfp](Remote Frame Pending Register) - Toshiba TXZ+ Series Reference Manual

[CANxCDR](Change Data Request Register)

Bit Bit Symbol After Reset Type
31 - 0
30:0 CDR[30:0] 0
Note: Mailbox 31 is receive only mailbox.
The change data request register [CANxCDR] is effective when updating the data field of transmission mailbox n
where auto acknowledgment of remote frames is enabled ([CANxMBnID]<RFH>=1). Mailbox n enabling
automatic acknowledgment starts message transmission automatically responding to received remote frames and
so may update the data field during message transmission (In such cases, updated data is output midway through
transmission). The update of the data field can be avoided by setting the <CDRn> bit to "1" and temporarily
suspending data transmission.

[CANxRFP](Remote Frame Pending Register)

Bit Bit Symbol After Reset Type
31:0 RFP[31:0] 0
The [CANxRFP]<RFPn> bit is set by the internal logic and can be cleared with a write of "1" to the
[CANxRMP]<RMPn> bit from the CPU. The [CANxRMP]<RMPn> bit is also cleared at the same time. A write
of "0" to the [CANxRMP]<RMPn> bit and a write of "1" or "0" to the [CANxRFP]<RFPn> bit from the CPU are
invalid.
Even when mailbox n with [CANxRFP]<RFPn>=1 is overwritten by data frame reception, the
[CANxRFP]<RFPn> bit is cleared.
When the remote frame pending interrupt is enabled by setting the <RFPM> bit in the global interrupt mask
register [CANxGIM] to "1", the CAN global interrupt (INTCANxGLB) occurs.
R Read as "0".
Change data request (Each bit corresponds to mailboxes 30 to 0.)
When the <CDRn> bit of transmission mailbox n is set to "1", the transmission request of this
mailbox n is ignored.
R/W
It means mailbox n for which the [CANxTRS]<TRSn> bit and the <CDRn> bit are set will be
excluded from the internal arbitration range and will not be transmitted if transmission has not
started. After the <CDRn> bit is cleared to "0", mailbox n is back to be included in the internal
arbitration range.
Remote frame pending (Each bit corresponds to mailboxes 31 to 0.)
When mailbox n configured as receive mailbox receives a remote frame, the <RFPn> bit and
R/W [CANxRMP]<RMPn> bit are set to "1".
The <RFPn> bit can be cleared by a write of "1" to the [CANxRMP]<RMPn> bit.
45 / 52
Function
Function
TXZ+ Family
CAN Controller
2020-10-01
Rev. 1.0