[Canxtrr](Transmission Request Reset Register) - Toshiba TXZ+ Series Reference Manual

[CANxTRR](Transmission Request Reset Register)

Bit Bit Symbol After Reset
31 - 0
30:0 TRR[30:0] 0
Note: Mailbox 31 is receive only mailbox.
The transmission request reset register can be set by a write of "1" from the CPU to only the [CANxTRR]<TRRn>
bits of the mailboxes configured for transmission. The [CANxTRR]<TRRn> bits of the mailboxes configured for
reception cannot be set.
The [CANxTRR]<TRRn> bit is cleared to "0" by the internal logic when the message has been successfully
transmitted or the transmission is aborted. A write of "0" from the CPU is invalid.
When the [CANxTRR]<TRRn> bit is "1", do not write to mailbox n.
Setting the [CANxTRR]<TRRn> bit cancels the message transmission of mailbox n set by the
[CANxTRS]<TRSn> bit, where the operation executed will be any of the following three sequences:
(a) A transmission request of a message has not yet been transmitted.
A transmission request of a message will be cleared immediately.
([CANxTRS]<TRSn> = 0, [CANxTRR]<TRRn> = 0, [CANxAA]<AAn> = 1)
(b) A transmission request of a message is currently being transmitted and an arbitration lost error occurs or
an error is detected on the CAN bus.
A transmission request of a message will be cleared and the transmission will be canceled.
([CANxTRS]<TRSn> = 0, [CANxTRR]<TRRn> = 0, [CANxAA]<AAn> = 1)
(c) A transmission request of a message is currently being transmitted and no arbitration lost error occurs and
no error is detected on the CAN bus.
A transmission request of a message will not be cleared and the transmission will be completed
([CANxTRS]<TRSn> = 0, [CANxTRR]<TRRn> = 0, [CANxTA]<TAn> = 1)
Type
R Read as "0"
Transmit request reset (Each bit corresponds to mailboxes 30 to 0.)
Setting <TRRn> cancels the message transmission of corresponding mailbox n.
R/W
A write of "1" from the CPU to mailbox n configured as transmission mailbox can set the bit. Write
of "0" from the CPU is invalid.
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Function
TXZ+ Family
CAN Controller
2020-10-01
Rev. 1.0