Function And Operation; Clock Supply; Can Interface - Toshiba TXZ+ Series Reference Manual

3. Function and Operation

3.1. Clock Supply

When you use CAN, please set an applicable clock enable bit to "1" (clock supply) in fsys supply stop register A
([CGFSYSENA], [CGFSYSMENA]), fsys supply stop register B ([CGFSYSENB], [CGFSYSMENB]), fsys
supply stop register C([CGFSYSMENC]), and fc supply stop registers ([CGFCEN]).
An applicable register and the bit position vary according to a product. Therefore, the register may not exist with
the product. Please refer to "Clock Control and Operation Mode" of reference manual for the details.
When attempting to stop supplying the clock, make sure to check whether the CAN is stopped. Note that when the
MCU enters STOP mode, make sure to check whether the CAN is stopped as well.
When fsys clocks of CAN stop, CANxCLK stops.

3.2. CAN Interface

The interface to the CAN bus are an input pin CANxRX and an output pin CANxTX. Connect these pins via the
CAN bus transceiver (ISO / DIS 11898 compliant).
High speed and low speed transceivers are differentiated. Care must be taken to ensure that the electrical
characteristics of these pins at the chip level (eg, 3.3 V to 5 V) satisfy the requirements of the transceiver.
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TXZ+ Family
CAN Controller
2020-10-01
Rev. 1.0