[Canxgsr](Global Status Register) - Toshiba TXZ+ Series Reference Manual

[CANxGSR](Global Status Register)

Bit Bit Symbol After Reset Type
31:17 - 0
16:12 MIS[4:0] 11111
11 RM 0
10 TM 0
9 - 0
8 SUA 0
7 CCE 1
6 SMA 0
5:4 - 0
3 TSO 0
2 BO 0
1 EP 0
0 EW 0
R Read as "0".
Message in slot
Indicates the mailbox number of a message located in the transmission buffer.
00000: Message for mailbox 0 01011: Message for mailbox 11 10110: Message for mailbox 22
00001: Message for mailbox 1 01100: Message for mailbox 12 10111: Message for mailbox 23
00010: Message for mailbox 2 01101: Message for mailbox 13 11000: Message for mailbox 24
00011: Message for mailbox 3 01110: Message for mailbox 14 11001: Message for mailbox 25
R 00100: Message for mailbox 4 01111: Message for mailbox 15 11010: Message for mailbox 26
00101: Message for mailbox 5 10000: Message for mailbox 16 11011: Message for mailbox 27
00110: Message for mailbox 6 10001: Message for mailbox 17 11100: Message for mailbox 28
00111: Message for mailbox 7 10010: Message for mailbox 18 11101: Message for mailbox 29
01000: Message for mailbox 8 10011: Message for mailbox 19 11110: Message for mailbox 30
01001: Message for mailbox 9 10100: Message for mailbox 20 11111: No message
01010: Message for mailbox 10 10101: Message for mailbox 21
Receive mode
R 0: The CAN controller is not receiving a message.
1: The CAN controller is receiving a message.
Transmit mode
R 0: The CAN controller is not transmitting a message.
1: The CAN controller is transmitting a message.
R Read as "0".
Suspend mode acknowledge
R 0: The CAN controller is not in suspend mode.
1: The CAN controller is in suspend mode.
Change configuration enable
0: The CAN controller is not in configuration mode.
R
1: The CAN controller is in configuration mode.
In this mode, it is possible to write the bit configuration registers, [CANxBCR1] and [CANxBCR2].
Sleep mode acknowledge
0: The CAN controller is not in sleep mode.
R 1: The CAN controller is in sleep mode.
In this mode, the clock of the CAN controller stops and the error counters and transmission request are
reset.
R Read as "0".
Time stamp overflow
0: The time stamp counter does not overflow.
R
1: The time stamp counter has overflowed at least once after this bit was last cleared to "0". To clear
this bit, a clear the [CANxGIF]<TSOIF> bit to "0".
Bus off status
0: In the bus on state (normal operation)
1: In bus off state
R When CAN bus errors occur abnormally often and the transmission error counter <TEC> reaches its
limit of 256, the CAN controller enters bus off state. No messages can be transmitted or received. The
error counter is undefined.
After the bus off recovery sequence, the CAN controller automatically enters bus on state.
Error passive status
R 0: The CAN controller is not in error passive mode.
1: The CAN controller is in error passive mode.
Warning status
0: Both <TEC> and <REC> values are 96 or less.
R
1: At least one of the <TEC> and <REC> values is greater than 96 and has reached the warning
level.
Function
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TXZ+ Family
CAN Controller
2020-10-01
Rev. 1.0