2. Block Diagram
Figure 2.1 shows the Block Diagram of CAN controller
CANxCLK
INTCANxRXD
INTCANxTXD
INTCANxGLB
(32MailBox)
No
Symbol
1
INTCANxRXD
2
INTCANxTXD
3
INTCANxGLB
4
CANxTX
5
CANxRX
6
CANxCLK
Control & Interrupt
Control
CPU
interface
Prio rity
comparison
regi ster
Mailbox
Data output
RAM
Data input
CAN state-machine
Figure 2.1 Block Diagram of CAN controller
Table 2.1 List of Signals
Signal name
CANx reception completion
interrupt
CANx transmission completion
interrupt
CANx global interrupt
CANx TX signal
CANx RX signal
CANx clock(f
/4)
sys
Transmit buffer
Transmit data
CAN protocol controller
Receive data
Receive buffer
ID matched
Time
Receive
stamp
filter
counter
I/O
Output
Exception
Output
Exception
Output
Exception
Output
Input/Output ports, Product information
Input
Input/Output ports, Product information
Input
Clock Control and Operation Mode
10 / 52
TXZ+ Family
CAN Controller
CANxTX
CANxRX
Receive
mask
Related Reference Manual
2020-10-01
Rev. 1.0