Index Register - Mitsubishi Electric MELSEC-A0J2H Series Handbook

7
PROGRAMS REPLACEMENT

7.7.8 Index register

(1) Replacing index register
"Z, V" and "Z0 to Z9" are used as index register for the A0J2HCPU and QCPU, respectively. Therefore,
their specifications differ.
"V" is used as edge relay for QCPU. The device is used to memorize the PLS/PLF information to
contacts from the start of the ladder block.
The following table shows replacement of index register when A0J2HCPU program was utilized to
QCPU with "Change PLC type".
(2) Index register 32-bit specification
When using index register as 32-bit instruction in the A0J2HCPU, Z and V that has the same number
with Z are processed as low-order 16-bit value and high-order 16-bit value, respectively.
However, QCPU processes Zn and Zn + 1 as low-order 16 bits and high-order 16 bits, respectively.
If a program to which "Change PLC type" is performed includes index register with 32-bit specification,
reviewing the index register after "Change PLC type" is necessary.
The following shows an example using an instruction whose operation result will be in 32 bits.
Instruction
DMOV D0 Z
/ D0 D1 Z
When utilizing the A0J2HCPU program to QCPU with "Change PLC type", the operation result may be
stored to the index register having different number as intended one.
(Example)
A0J2HCPU
Replaced by the
Basic model
QCPU with
"Change PLC type"
7
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QCPU
Z0
Z7
(High order) (Low order)
Z0 (Quotient)
Z1 (Remainder)
A0J2HCPU
QCPU
Z1, Z0
Device replaced with "Change PLC type".
Modify this to Z1.
Z
V
A0J2HCPU
V, Z
(High order) (Low order)
Z (Quotient)
V (Remainder)
Z and V store quotient
and remainder,
respectively.
Z0 and Z1 store quotient
and remainder,
respectively.