Mitsubishi Electric MELSEC-A0J2H Series Handbook page 131

Table of Contents

Advertisement

7
PROGRAMS REPLACEMENT
Description
Bit reset of word device
Bit set of word device
1-bit shif to left of n-bit data
1-bit shift to right of n-bit data
Sub-routine program calls
Special format failure checks
Reverse of device output
Pointer branch instructions
Carry flag reset
16-bit data negation transfer
Refresh instruction
BIN 32-bit addition, subtraction
BIN 32-bit multiplication, division
Logical products of 32-bit data
BCD 8-digit addition, subtraction
BCD 8-digit multiplication, division
Conversion from BIN data to BCD 8-digit
Conversion from BCD 8-digit to BIN data
32-bit data negation transfer
32-bit BIN data decrement
16-bit BIN data decrement
8  256-bit decode
: Automatic converted,
A0J2HCPU
Instruction name Instruction name Convertibility
BRST
BRST
BRSTP
BRSTP
BSET
BSET
BSETP
BSETP
BSFL
BSFL
BSFLP
BSFLP
BSFR
BSFR
BSFRP
BSFRP
CALL
CALL
CALLP
CALLP
CHK
OUT SM1255
CHK
OUT SM1255
CJ
CJ
CLC
OUT SM1255
CML
CML
CMLP
CMLP
COM
COM
D+
D+
D+P
D+P
D-
D-
D-P
D-P
D*
D*
D*P
D*P
D/
D/
D/P
D/P
DAND
DAND
DANDP
DANDP
DB+
DB+
DB+P
DB+P
DB-
DB-
DB-P
DB-P
DB*
DB*
DB*P
DB*P
DB/
DB/
DB/P
DB/P
DBCD
DBCD
DBCDP
DBCDP
DBIN
DBIN
DBINP
DBINP
DCML
DCML
DCMLP
DCMLP
DDEC
DDEC
DDECP
DDECP
DEC
DEC
DECP
DECP
DECO
DECO
DECOP
DECOP
×
: Partially changed,
: Manual conversion required
QCPU
Reference sections
×
Section 7.2.2 (3)
×
Section 7.2.2 (1)
×
Section 7.2.2 (3)
7
- 19

Advertisement

Table of Contents
loading

This manual is also suitable for:

Melsec q series

Table of Contents