Introduction
1.5
Technical Specification
Table 1-1:
CP6016 Main Specifications
FEATURES
CPU
Memory
Intel® 5100 MCH
Intel® ICH9R
Page 1 - 10
The CP6016 supports the Intel® Core™2 Duo 45-nm based processor, T9400
(SV), 2.53 GHz, 1066 MHz FSB, 6 MB L2 cache, in a 479 µFCBGA packaging.
Main Memory:
Up to 8 GB dual-channel, registered DDR2 memory with Error Checking
•
and Correcting (ECC) running at 667 MHz (PC2-5300) on two SO-
RDIMM sockets
Cache structure:
64 kB L1 on-die full speed processor cache
•
32 kB for instruction cache
•
32 kB for data cache
•
6 MB L2 on-die full speed processor cache
•
FLASH Memory:
Two 4 MB SPI Flash chips for redundant uEFI BIOS
•
USB 2.0 NAND Flash memory optionally available
•
Serial ATA SSD Flash memory optionally available
•
Serial EEPROM:
24LC64 (64 kbit)
•
Intel® 5100 Memory Controller Hub:
Support for a single Intel® Core™2 Duo microprocessor
•
64-bit AGTL/AGTL+ based System Bus interface up to 1066 MHz
•
System Memory interface with optimized support for dual-channel, reg-
•
istered DDR2 SDRAM memory at 667 MHz (PC2-5300) with ECC
Two x4 PCI Express ports for the Intel® 82571EB GbE controllers
•
Two x4 PCI Express ports for the PCI Express-to-PCI/PCI-X bridges
•
One x8 PCI Express port for the XMC interface
•
RASUM (Reliability, Availability, Serviceability, Usability, and
•
Manageability) features:
Memory error detection and reporting of 1- and 2-bit errors including
•
correction of 1-bit failures
Integrated Memory Scrub Engine, which logs any uncorrectable
•
memory errors
Support for automatic read retry on uncorrectable errors
•
Intel® 82801IR I/O Controller Hub (ICH9R):
Power management logic support
•
Enhanced DMA controller, interrupt controller, and timer functions
•
USB 2.0 host interface with twelve USB ports (only seven ports are
•
used on the CP6016)
SATA Host Controller with six ports, 3 Gbit/s transfer rate and RAID
•
0/1/5/10 support
Six x1 PCI Express ports, only one x1 PCI Express port is used on the
•
CP6016 for the Gigabit Ethernet controller Intel® 82574L
System Management Bus (SMBus) compatible with most I²C™ devices
•
High Definition Audio (HDA) interface routed to rear I/O
•
Low Pin Count (LPC) interface
•
SPI Flash interface support
•
RTC controller
•
SPECIFICATIONS
ID 1022-3074, Rev. 2.0
CP6016