Evaluation Board Overview; Typical Operation; Input Current - Analog Devices ADP5062 User Manual

Linear li-ion battery charger with power path and usb compatibility in lfcsp
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Evaluation Board User Guide

EVALUATION BOARD OVERVIEW

J8

TYPICAL OPERATION

The typical test setup for the
power supply unit (PSU) for VIN_F, a source meter unit (SMU)
or a battery simulator for the ISO_B_x pins, and a variable
power resistor or electronic load for the ISO_S_x pins.
The SMU at the ISO_B node must have a 100 mΩ to 250 mΩ
resistor (R
) in series with its positive lead. The resistor emulates
S
the equivalent series resistance of a real battery. Some SMU
models that have been successfully used for the ISO_Bx node
include the following:
Keithley 2306 battery simulator
Keithley 2602A SMU
Agilent 6784A/6762A SMU
12
10
SYS_EN
J5
D2
D1
D3
11
13
TP6
D3
D2
D1
JP2
R7
R6
R5
VIN_F
D1
VIN_F
D1S
J7
J6
D2
VIN_S
D2S
R8
10
R13
D1
14
ILED
U3
R17
C6
ILED_S
JP1
R11
GND
GND
J11
GND
GND
SDA
R15
20
R14 R1
R2
SCL
R10
C2
U1
TP5
C1
VCO_LDO
Figure 5.
ADP5062
ADP5062
charger consists of a dc
14
2
7
17
VIN_S
THR
GND_S
ISO_S_S
15
1
8
9
16
ISO_B_S
TP3
R3
C12
CBP
J10
THR
TP4
R18
U2
ISO_B_F
C5
ISO_B_S
R16
ISO_B_S
ISO_S_S
BAT_SNS
TP20
ISO_S_F
C3
C4
ISO_S_F
J3
GND
ISO_S_F
GND
THR
VIN_F
J2
J1
1
LFCSP Demo Board Typical Operation Setup.

INPUT CURRENT

Measuring Total Input Current (I
When measuring VINx input quiescent currents, take into
account that the evaluation board includes an LDO (U1) and
2
I
C input/output (I/O) expander (U2A, U3A in Figure 7). The
LDO generates a 3.4 V VDDIO voltage for the I
SYS_EN open-drain output, and the I/O expander controls
digital inputs DIG_IO1, DIG_IO2, and DIG_IO3.
In the
ADP5062
U3 are powered through a pin header, J3. Typically, the combined
current consumption of the U1 and the U3 are in the range of
1 mA to 2 mA. To separate the evaluation board quiescent
current from the
open and connect a second dc power supply (3.5 V to 5.0 V) to
the test-point TP5 (see Figure 6).
Rev. 0 | Page 7 of 15
GND
19
18
JP3
AGND
GND
GND
5
BAT_SNS
SYS_EN
SDA
SCL
16
20
BAT_SNS
ISO_B_F GND
1
R
S
)
VIN
evaluation board typical setup, the U1 and the
ADP5062
VINx quiescent current, leave J3
UG-500
2
C bus and

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