Schematic Diagram - Analog Devices ADP5062 User Manual

Evaluation Board User Guide

SCHEMATIC DIAGRAM

J1
CON4
R1
56k
U1
8 1
GND8 ADJ
7 2
GND7 VIN
6 3
GND6 VOUT
5 4
GND5 EN
adp1720
R8
U3A
1k5
pca9557dbg4
3 6
A0 P0
4 7
A1 P1
5 9
A2 P2
10
P3
11
P4
12
P5
13
P6
14
R10 P7
1 2
SCL
SCL SDA
0R
15
RESET*
8 16
GND VCC
R13
1k5
SYM 1 OF 1
R14 R15
1k5
1k5
JP1
3
SCL
3
2
SDA
2
1
1
HEADER_3
ISO_S_F
C7 C8 C9 C10 C11
47u 47u 47u 47u 47u
47 uF Capacitors Not Assembled
PADs Placed on Bottom Side
J2
CON4
R2
TP5
VDD_LDO
100k
VIN_F
J3
1
2
3
C1 C2
VDDIO
CON3
1u 1u
ISO_S_F
VDDIO
R5 R6 R7
N.A. N.A. N.A.
SY S_EN
J5
J6
J7
J8
R11
SDA
J9
0R
ILED
C6
100n
TP11
TP10
DIG_IO1 DIG_IO1_S
ATEST1
ATEST2
ATEST3
ATEST4
Figure 7. ADP5062
TP1 TP2 TP3 TP4
VIN_F VIN_S
SCL SDA
SN6
C3
10uF
BAT_SNS
17
SDA
1
SCL
2
DIG_IO3
3
DIG_IO2
4
BAT_SNS
5
DIG_IO1
6
VIN1
7
VIN2
8
VIN3
TP12 TP13 TP14 TP15
TP16
SN8
SN5
DIG_IO2 DIG_IO2_S DIG_IO3 DIG_IO3_S ISO_S_S
Connectors to motherboard
JP2
DIG_IO1
1 2
DIG_IO1_S
3 4
DIG_IO2
5 6
DIG_IO2_S
7 8
DIG_IO3
9 10
DIG_IO3_S
11 12
ILED
13 14
ILED_S
15 16
17 18
19 20
HeaderLarge10x2
LFCSP Demo Board Schematic
Rev. 0 | Page 11 of 15
CBP_S CBP
SN10
C12
100nF
U2
16
SY S_EN
15
ILED
14
ISO_B3
13
ISO_B2
12
ISO_B1
18
THR
11
ISO_S3
10
ISO_S2
9
ISO_S1
ADP5062 QFN20
TP9
SN11
1
C5
22uF
C4
22uF
TP17 TP19
TP18 TP20
R16
SN3 SN4
0R
ISO_S_F ISO_B_S ISO_B_F BAT_SNS ILED_S
JP3
VIN_F AGND
1 2
3 4
VIN_S
5 6
R18 7 8
ISO_B_F
9 10
150m
11 12
ISO_B_S
13 14
ISO_S_S
15 16
17 18
AGND ISO_S_F
19 20
HeaderLarge10x2
UG-500
TP6
SYS_EN
TP7 TP8
THR
R3
J10
D1
LED
ISO_S_F
R17
470R
J11
1
2
3
CON3
ILED VDDIO
BAT_SNS
DTEST
SY S_EN
SDA
SCL