LTE Standard Module Series
EC2x&EG2x-G Series PCB Design Guideline
3.9. ADC Interface
All ADC signal traces should be surrounded with ground.
GND
ADC1
ADC0
GND
GND
GND
Figure 28: Overview of ADC Signal Traces (EVB 3rd Layer)
EC2x&EG2x-G_Series_PCB_Design_Guideline
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