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Designing EZ-ICE Compatible Systems
Figure 3-4. EZ-ICE 14-pin Header
Designing EZ-ICE Compatible Systems
This section describes the ADSP-218x family EZ-ICE theory of operation
to aid your EZ-ICE compatible system designs.
When power is applied to the board, a reset circuit holds the processor in
for approximately 200 ms.
RESET
sor begins the boot process. The Mode A-D pins are set up by default to
boot the processor from the byte-wide memory interface, which is con-
nected to the Flash EPROM.
The hardware consists of a printed circuit board measuring 3.5 inches by
5.5 inches. Assembled onto the printed circuit board are: an
ADSP-2189M digital signal processor, a Flash EPROM, an AD73322
codec, and various support circuits and connectors. The board is a com-
plete signal processing system designed to demonstrate the capabilities of
the ADSP-2189M digital signal processor. It can also be used as a plat-
form to develop new applications targeting ADSP-2189M processors.
3-14
RESET
ADSP-2189M EZ-KIT Lite Evaluation System Manual
is then de-asserted and the proces-
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