56F826Evm Configuration Jumpers; Block Diagram Of The 56F826Evm - Motorola DSP56F826EVM Hardware User Manual

56f826 evaluation module
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customer's application-specific device(s). The 56F826EVM is flexible enough to allow a
user to fully exploit the 56F826's features to optimize the performance of his product, as
shown in
Figure
1-1.
RESET
LOGIC
MODE
LOGIC
Program Memory
64Kx16-bit
SRAM
Data Memory
64Kx16-bit
SRAM
Memory
Daughter Card
Connector
JTAG
Connector
Parallel
DSub
JTAG
25-Pin
Interface
4.00MHz
Crystal
Figure 1-1. Block Diagram of the 56F826EVM

1.2 56F826EVM Configuration Jumpers

Seven jumper groups, (JG1-JG7), shown in
features on the 56F826EVM board.
1-2
Freescale Semiconductor, Inc.
56F826
SPI
RESET
IRQ
MODE
SCI
Address,
Data &
Control
JTAG/OnCE
SSI
GPIO
+2.5V, +3.3V
XTAL/EXTAL
& GND
Figure
Table 1-1
56F826 Evaluation Module Hardware User's Manual
For More Information On This Product,
Go to: www.freescale.com
SPI EEPROM
1M-bit
IRQ Interface
RS-232
Interface
Peripheral
Daughter Card
Connector
Stereo 16-bit
Codec
Amp
Debug LEDs
Power Supply
+2.5V, +3.3V & +5.0V
1-2, are used to configure various
describes the default jumper group settings.
DSub
9-Pin
Stereo Line In
Stereo Line Out
Headphone Jack
MOTOROLA

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