Audio Inputs Expansion Header J1900 (27); Audio Outputs Expansion Header J1901 (26); Table 13. Audio Inputs Expansion Header Pinout J1900 - Intrinsyc Open-Q 845 mSOM User Manual

Open-Q™ 845 µSOM Development Kit User Guide
7 VREG_LVS2A_1P8
9 GND
11 GPIO122_HRM_INT
13 SSC6_QUP1_4_SPI1_CS1_N
GPIO62_QUA_MI2S_DATA
15
2
17 No Net
19 SSC5_QUP1_3_SPI1_CS0_N
21 SSC4_QUP1_2_SPI1_CLK
23 No Net
For more details regarding configuring the GPIOs on this header, refer to the Open-Q 845 Software
Release Notes to determine feature support in the latest software release.

3.7.18 Audio Inputs Expansion Header J1900 (27)

The Open-Q 845 µSOM Development Kit audio subsystem is built around the Qualcomm Audio
Codec WCD9340 (28). The Audio Inputs Expansion Header J1900 exposes some of the audio input
capabilities of WCD9340 for the user. See item 27 in Figure 1 for the carrier board location of this
header. The pinout for this header is shown in the table below.

Table 13. Audio Inputs Expansion Header Pinout J1900

Pin
Signal
No
1 CDC_IN1_P
3 CDC_IN3_P
5 CDC_MIC_BIAS1
7 CDC_IN4_P
9 CDC_MIC_BIAS4
11 GND
13 CDC_DMIC_CLK0
CDC_DMIC_DATA
15
0
17 VREG_S4A_1P8
19 GND

3.7.19 Audio Outputs Expansion Header J1901 (26)

The Open-Q 845 µSOM Development Kit audio subsystem is built around the Qualcomm Audio
Codec WCD9340 (28). The Audio Outputs Expansion Header J1901 exposes some of the audio
output capabilities of WCD9340 for the user. See item 26 in Figure 1 for the carrier board location of
this header. The pinout for this header is shown in the table below.
© Copyright Intrinsyc Technologies Corporation
µSOM low voltage
switch LVS2 +1.8V
Ground
CPU GPIO122
CPU Sensor Core
SSC_GPIO6
CPU GPIO62
CPU Sensor Core
SSC_GPIO5
CPU Sensor Core
SSC_GPIO4
Description
Codec Input 1 Positive
Codec Input 3 Positive
Microphone Bias 1
Codec Input 4 Positive
Microphone Bias 4
System Ground
Digital Microphone 0 Clock
Digital Microphone 0 Data
µSOM LDO Regulator S4A
+1.8V
System Ground
8 VREG_L19A_3P0
10 GND
12 GPIO125_TS_INT_N
14 GPIO120_ALSP_INT_N
16 GPIO119_MAG_INT_N
18 GPIO124
20 SSC3_QUP1_1_SPI1_MOSI
22 SSC2_QUP1_0_SPI1_MISO
SSC7_QUP1_5_SPI1_CS2_
24
N
Pin
Signal
No
2 CDC_IN1_N
4 CDC_IN3_N
6 CDC_MIC_BIAS3
8 CDC_IN4_N
10 MB_VREG_3P3
12 GND
14 CDC_DMIC_CLK1
CDC_DMIC_DATA
16
1
18 CDC_DMIC_CLK2
CDC_DMIC_DATA
20
2
Version 1.0
µSOM LDO L19A
+3.0V
Ground
CPU GPIO125
CPU GPIO120
CPU GPIO119
CPU GPIO124
CPU Sensor Core
SSC_GPIO3
CPU Sensor Core
SSC_GPIO2
CPU Sensor Core
SSC_GPIO7
Description
Codec Input 1 Negative
Codec Input 3 Negative
Microphone Bias 3
Codec Input 4 Negative
Carrier board switching
regulator +3.3V
System Ground
Digital Microphone 1 Clock
Digital Microphone 1 Data
Digital Microphone 2 Clock
Digital Microphone 2 Data
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