Clock Distribution - SMART Embedded Computing MVME7100ET Programmer's Reference Manual

4.13

Clock Distribution

The clock function generates and distributes all the clocks required for system operation.
The PCI-E clocks are generated using an eight output differential clock driver. The PCI/PCI-
X bus clocks are generated by the bridge chips from the PCI-E clock. Additional clocks
required by individual devices are generated near the devices using individual oscillators.
The following table lists the clocks required on the MVME7100ET along with their
frequency and source.
Table 4-12
Device
CLK_CPU
MC864xD
MC864xD
PMC1
PMC2
Tsi148
USB
BCM5482S
BCM5482S
Control and Timers
PLD
QUART
RTC
ICS9FG108
PEX8525
PEX8114
PEX8114
PEX8114
PEX8112
MC864xD
MVME7100ET Single Board Computer Programmer's Reference (6806800K88C)
Clock Assignments
Clock
Signals
MC864xD
CLK125MHZ
CLK_RTC
CLK_PCI1
CLK_PCI2
CLK_PCI3
CLK_PCI4
CLK2_25MHZ
CLK3_25MHZ
CLK1_25MHZ
CLK_LBP
CLK_1.8M
CLK_32K
CLK4_25MHZ
CLK_PCIE0
CLK_PCIE1
CLK_PCIE2
CLK_PCIE3
CLK_PCIE4
CLK_PCIE5
Frequency Clock Tree
(MHz) Source
66 Oscillator
125 Oscillator
1 PLD
33/66/100 PEX8114
33/66/100 PEX8114
133 PEX8114
33 PEX8112
25 Oscillator/Buffer
25 Oscillator/Buffer
25 Oscillator/Buffer
MPX CLK / 8 MC864xD
1.8432 Oscillator
32.768 KHz Crystal
25 Oscillator
100 ICS9FG108
100 ICS9FG108
100 ICS9FG108
100 ICS9FG108
100 ICS9FG108
100 ICS9FG108
Programming Details
Qty VIO
1 +3.3 V
1 +2.5 V
1 +3.3 V
1 +3.3 V
1 +3.3 V
1 +3.3 V
1 +3.3 V
1 +2.5 V
1 +2.5 V
1 +3.3 V
1 +3.3 V
1 +3.3 V
1 +3.3 V
1 +3.3 V
1 DIFF
1 DIFF
1 DIFF
1 DIFF
1 DIFF
1 DIFF
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