System Status Register - SMART Embedded Computing MVME7100ET Programmer's Reference Manual

Register Descriptions
NOTES:
1. Reserved for future implementation.
2. 32-bit write only.
3. Byte read/write capable.
3.1.1

System Status Register

The MVME7100ET has a System Status Register that is a read only register used to
provide general board status information.
Table 3-2
REG
BIT
Field
OPER
RESET
BD_TYPE
PEX8525ERROR
SAFE_START
Core 1 OFFSET
28
System Status Register
System Status Register - 0xF200 0000
7 6 5
MASTER
SW8 PMC 133
WP
R
X X X
Board Type. These bits indicate the board type.
00: VME SBC
01: PrPMC
10-11: reserved
PEX8525 Fatal Error. This bit reflects the Fatal Error signal from the
PEX8525. A set condition indicates the error signal is active.
ENV Safe Start. This bit reflects the current state of the ENV safe
start select switch. A cleared condition indicates that the ENV
settings programmed in NVRAM should be used by the firmware. A
set condition indicates that firmware should use the safe ENV
settings.
Core 1 Low Memory Offset. This bit reflects the current state of Core
1 Low Memory Offset switch. A cleared condition indicates the
switch is off. A set condition indicates the switch is on. When this
switch is on, real address A in the range of 0 to 256 MBytes-1 is
translated to address A +256 MBytes. When this switch is off, the
address is not translated.
MVME7100ET Single Board Computer Programmer's Reference (6806800K88C)
4 3 2
PEX
Core 1 SAFE_S
8525
OFFSET TART
ERROR
X X 0
Register Descriptions
1 0
BD_TYPE
0 0