Other Software Considerations; Lbc Timing Parameters - SMART Embedded Computing MVME7100ET Programmer's Reference Manual

Programming Details
The arbitration assignments on the MVME7100ET are shown in the table below so that
software may set arbiter priority assignments if necessary.
Table 4-10
PCI Bus
1
1
2
2
3
4.12

Other Software Considerations

4.12.1

LBC Timing Parameters

The following table defines the timing parameters for the devices on the local bus.
Table 4-11
BCTLD
CSNT
ACS
XACS
SCY
SETA
TRLX
EHTR
EAD
60
PCI Arbitration Assignments
Arbitration Assignment
PEX8114 REQ/GNT[0]
PEX8114 REQ/GNT[1]
PEX8114 REQ/GNT[0]
PEX8114 REQ/GNT[1]
PEX8114 REQ/GNT[0]
LBC Timing Parameters
0 1
NOR NOR
Flash Flash
0 0
1 1
3 3
1 1
4 4
0 0
0 0
0 0
0 0
MVME7100ET Single Board Computer Programmer's Reference (6806800K88C)
PCI Master(s)
PMC site 1 primary master
PMC site 1 secondary master
PMC site 2 primary master
PMC site 2 secondary master
Tsi148 VME Controller
2
3
NAND
MRAM
Flash
0 0
1 1
0 0
0 0
3 1
0 0
1 1
0 0
0 0
Programming Details
4 5
CSR UART
0 0
0 1
0 0
0 0
5 2
0 0
0 1
0 0
0 0
6
Timers
0
0
0
0
5
0
0
0
0