SMART Embedded Computing MVME7100ET Programmer's Reference Manual page 53

Table 4-1
MC864xD
Signal
TSECn_TXD[6:7]
TSEC1_TXD[2:4]
LWE1
D1_MSRCID[0]
D1_MSRCID[1]
MVME7100ET Single Board Computer Programmer's Reference (6806800K88C)
MC864xD POR Configuration Settings (continued)
Default
Select
POR
Option
Settings
Resistor 10
Processor
111
Default
Control PLD 1
1
No Connect
(processor
default)
1
No Connect
(processor
default)
Programming Details
Description State of Bit vs Function1
00
01
eTSECn
Protocol
Configuration
10
11
RapidIO Device
Device ID used for serial RapidIO
ID
hosts.
0
Serial RapidIO
System Size
1
0
Memory Debug
Configuration
1
0
DDR Debug
Configuration
1
eTSECn controller operates
using FIFO.
eTSECn controller operates
using MII(RMII).
eTSECn controller operates
using GMII(RGMII)
eTSECn controller operates
using TBI
Up to 65,536 devices
Up to 256 devices
Debug information from
LBC is driven on the
D1_MSRCIDn and
D1_MDVAL signals
Debug information from
DDR SDRAM controller is
driven on the D1_MSRCID
and D1_MDVAL signals
DDR debug information is
driven on the ECC pins
instead of the normal ECC
I/O.
DDR debug information is
not driven on the ECC pins.
53