Nand Flash Chip 1 Control Register; Nand Flash Chip 1 Select Register - SMART Embedded Computing MVME7100ET Programmer's Reference Manual

Register Descriptions
3.1.8

NAND Flash Chip 1 Control Register

The MVME7100ET provides a Control Register for the NAND Flash device.
Table 3-9
REG NAND Flash Chip 1 Control Register - 0xF200 0010
BIT 7
Field CLE
OPER R/W
RESET 0
WP
ALE
CLE
RSVD
3.1.9

NAND Flash Chip 1 Select Register

The MVME7100ET provides a Select Register for the NAND Flash device.
Table 3-10
REG
BIT
Field
OPER
RESET 0
36
NAND Flash Chip 1 Control Register
6 5
ALE WP
0 1
Write Protect. If cleared, WP is not asserted when the device is accessed.
If set, WP is asserted when the device is accessed.
Address Latch Enable. If cleared, ALE is not asserted when the device is
accessed. If set, ALE is asserted when the device is accessed.
Command Latch Enable. If cleared, CLE is not asserted when the device
is accessed. If set, CLE is asserted when the device is accessed.
Reserved for future implementation.
NAND Flash Chip 1 Select Register
NAND Flash Chip 1 Select Register - 0xF200 0011
7 6 5
CE1 CE2 CE3
R/W
0 0
MVME7100ET Single Board Computer Programmer's Reference (6806800K88C)
4 3 2
RSVD RSVD RSVD
R
0 0 0
4 3
CE4 RSVD
R
0 0
Register Descriptions
1 0
RSVD RSVD
0 0
2 1 0
RSVD RSVD RSVD
0 0 0