Table of Contents
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Table 3-1
Address
F201 5000 -
F201 FFFF
F202 0000
F202 0010
F202 0014
F202 0018
F202 001C
F202 0020
F202 0024
F202 0028
F202 002C
F202 0030
F202 0034
F202 0038
F202 003C
F202 0040
F202 0044
F202 0048
F202 004C -
F2FF FFFF
F203 0000
F203 0001 -
F203 0FFF
F203 1000
F203 1001 -
F203 FFFF
MVME7100ET Single Board Computer Programmer's Reference (6806800K88C)
System I/O Memory Map (continued)
Definition
Reserved
External PLD Tick Timer Prescaler Register
External PLD Tick Timer 1 Control Register
External PLD Tick Timer 1 Compare Register 6
External PLD Tick Timer 1 Counter Register
Reserved
External PLD Tick Timer 2 Control Register
External PLD Tick Timer 2 Compare Register 6
External PLD Tick Timer 2 Counter Register
Reserved
External PLD Tick Timer 3 Control Register
External PLD Tick Timer 3 Compare Register 6
External PLD Tick Timer 3 Counter Register
Reserved
External PLD Tick Timer 4 Control Register
External PLD Tick Timer 4 Compare Register 6
External PLD Tick Timer 4 Counter Register
Reserved
NAND Chip 1 Data Register
Reserved
NAND Chip 2 Data Register
Reserved
Register Descriptions
LBC Bank/Chip
Notes
Select
1
6
2
6
2
2
6
2
6
2
6
2
2
6
2
6
2
6
2
2
6
2
6
2
6
2
2
6
2
6
1
2
3
2
1
2
3
2
1
27
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