Vme Dataway Display; Fig. 40: Dataway Display Layout - Caen V2718 Technical Information Manual

Document type: Title:
User's Manual (MUT) Mod. V2718 VME PCI Optical Link Bridge

3.8. VME Dataway Display

The V2718 is provided with a 88 LED Dataway Display; such LEDs report the VME Bus
status (address, data and control lines) related to the latest cycle.
ADDR[31:0], AM[5:0], IACK, WRITE and LWORD: These LEDs are frozen on the AS
leading edge and remain stable until the next cycle.
DATA[31:0]: These LEDs are frozen either on the DS leading edge during the write
cycles, or on the DTACK (or BERR) leading edge during the read cycles. The datum
remains stable until the next cycle. In case of BLT cycles, the last read datum remains
visible.
DS0 and DS1: These LEDs turn on as the signal is active during the cycle just executed;
they remain stable until the next cycle.
AS: This LED flashes on the AS leading edge; it is used for signalling a cycle execution.
BGR: This LED flashes as any Bus Grant line (BG[3:0]) is active.
NPO:
00106/03:V2718.MUTx/11
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
AM0
AM1
AM2
AM3
AM4
AM5
DS0
DS1
AS
IACK
WR
LWRD
GREEN LED
RED LED

Fig. 40: Dataway Display layout

Filename:
V2718_REV11.DOC
Revision date:
03/07/2018
D00
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
BRQ
BGR
SRES
DT K
BERR
Revision:
11
Number of pages: Page:
79 44