Clock Source; Reset Source - ST STM3210B-EVAL User Manual

UM0426
Table 3.
Switch
SW1
SW2
2.4

Clock source

Two clock sources are available on the STM3210B-EVAL board for the STM32F10X
microcontroller and RTC.
X1, 32 KHz crystal for embedded RTC
X2, 8 MHz crystal with socket for the STM32F10X microcontroller. It can be removed
from the socket when the internal RC clock is used.
2.5

Reset source

The reset signal of the STM3210B-EVAL board is active low and the reset sources include:
Reset button B1
Debugging tools from connector CN7, CN9 and CN10
Daughterboard from CN13
Table 4.
Jumper
JP10
www.BDTIC.com/ST
Boot switches
Boot from
STM3210B-EVAL boots from user Flash when SW2 is set
as shown to the right (default setting).
In this configuration, the position of SW1 doesn't affect the
boot process.
Boot 0 = 0, Boot 1 = X
STM3210B-EVAL boots from embedded SRAM when
SW1 and SW2 are set as shown to the right.
Boot 0 = 1, Boot 1 = 1
STM3210B-EVAL boots from system memory when SW1
and SW2 are set as shown to the right.
Boot 0 = 1, Boot 1 = 0
Reset jumper
Enables reset of the STM32F10X microcontroller embedded JTAG TAP controller
each time a system reset occurs. JP10 connects the TRST signal from the JTAG
connection with the system reset signal RESET#.
Default setting: Not fitted
Doc ID 13472 Rev 5
Hardware layout and configuration
Switch configuration
Description
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