Cpu, Chipset And Super I/O Controller; Cpu And Chipset; Cpu Configuration; Super I/O Controller - Kontron MOPS/386A User Manual

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CPU, CHIPSET AND SUPER I/O CONTROLLER

5.

CPU and Chipset

5.1
The MOPS/386A features an ALi M6117C single chip that includes a highly integrated, low
voltage implementation of Intel's™ 386SX compatible microprocessor (40MHz), plus Ali's
M1217B chipset.
The M6117C provides the following functions:
Static Intel™ 386SX Core
ISA interface
Peripheral interface
Built-in RTC
Built-in PS2/AT keyboard controller
Built-in watchdog timer

CPU Configuration

5.2
See the Advanced Chipset Control Submenu section of the Appendix B: BIOS chapter for
information on setting the MHz speed of the CPU.

Super I/O Controller

5.3
A super I/O Controller (SMsC FDC37C669) is connected to the ISA interface of the chipset.
This controller offers the following features:
2.88MB Super I/O Floppy Disk Controller
Two high-speed NS16C550 compatible UARTs with 16Byte send/receive FIFOs
Multimode parallel port supporting standard, bi-directional, EPP and ECP mode
IDE interface
CPU, Chipset, and Super I/O
Two cascaded 8237 DMA controllers
74612 memory mapper
Two cascaded 8259 interrupt controllers
8254 programming counter
10
Kontron
MOPS/386A User's Guide

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