change it back to 1 will fail and ignore the program operation. For more details about the Advanced
Sector/Block Protection mechanism consult the manufacturer's datasheet.
To protect the MAC addresses from the last sector, Genesys ZU comes with TBPARM programmed to 0
and the PPB bits for the last sector programmed to 0.
Figure 4.1.1: Genesys ZU Quad SPI Flash
4.2. microSD slot
The microSD connector J9 located on the top side has a hinge‐based mechanism. It is compatible with
UHS‐I allowing 1.8V signalling and speeds up to SDR104, or 104MB/s. To enable UHS‐I support and
speeds up to SDR104, see the following Answer Records from Xilinx:
https://www.xilinx.com/support/answers/69978.html and
https://www.xilinx.com/support/answers/70062.html.
4.3. mSATA slot
The Mini PCIe connector J13 doubles as an mSATA slot allowing fast non‐volatile SSD storage. Both half
and full‐size modules are supported. Since PCIe and SATA share the same GTR lanes, one has to disable
PCIe first to enable SATA.
5. Network Connectivity
5.1. Wi‐Fi
A Microchip ATWINC1500 module provides 2.4GHz IEEE 802.11 b/g/n wireless network connectivity. It
interfaces to the MPSoC on the PS‐side over SPI, supporting a maximum theoretical data rate of
48Mbps. The ATWINC1500 can be used in bare‐metal applications with the full IP stack included in the
firmware loaded from flash. However, it is also supported in Linux in the ATWILC1000‐compatible mode,
where the firmware is loaded on‐the‐fly upon boot and the OS IP stack is used.
Need help?
Do you have a question about the Genesys ZU and is the answer not in the manual?
Questions and answers