Digilent Genesys ZU Reference Manual page 19

For more details about Quad SPI boot mode see "QSPI24 and QSPI32 Boot Modes" section in Zynq
UltraScale+ MPSoC Software Developer Guide (UG1137).
2.4. USB Boot Mode
It is the only boot mode apart from JTAG where the MPSoC takes a slave role. It shows up as a DFU
(Device Firmware Upgrade) USB device to the PC, waiting for a configuration. Using this boot mode you
will be able to load the newly created image on Zynq UltraScale+ via the USB Port. For more details see
the "Boot Sequence for USB Boot Mode" mode in Zynq UltraScale+ MPSoC: Embedded Design Tutorial
(UG1209).
2.5. Status LEDs
The Genesys ZU has four status LEDs:
ERR : it is asserted for accidental loss of power, a hardware error or an exception in the Platform
Management Unit (PMU);
STS : it is asserted in secure lockdown state;
INIT : indicates the PL is initialized after the power‐on reset (POR);
DONE : it is asserted when the PL configuration is completed;
For more details about configuration pins see "Clock, Reset, and Configuration Pins" section in Zynq
UltraScale+ Device Technical Reference Manual (UG1085).
3. Main Memory
Main memory is a single‐slot populated DDR4 SODIMM, always upgradeable by the user. It is wired to
the PS (Processing System) side using the hard‐core memory controller. The bundled module is a 4GiB
Kingston HyperX HX424S14IB/4. Although the module supports DDR4‐2400 CL14‐14‐14 timing, data rate
is limited by the MPSoC and the board. The 5EV board variant supports DDR4‐2133*, while the 3EG
supports DDR4‐1866.
Although the bundled module is not ECC‐capable, the Genesys ZU is. Just pair it with an ECC module and
enable the feature in the Vivado MPSoC PS Configuration Wizard.
3.1. Implementation
There is a single SODIMM slot on the top side of the Genesys ZU just north of the MPSoC. It is wired to
the PS‐side memory controller and supports any SODIMM module complying with the memory