Write_Lsram_0; Image Enhancement; Lcd_Fsm; Figure 4 Line_Write_Read Sd - Microchip Technology Microsemi Hello FPGA Libero Design User Manual

Video Demo Design
Figure 4 • Line_write_read SD
The Line_write_read module contains the following components:
•

WRITE_LSRAM_0,

•

Image Enhancement,

•

LCD_FSM,

3.1.1 WRITE_LSRAM_0
Signals from the Camera PLK_I, H_REF, and DATA_I(8) are transferred through the Double Flip-Flop
synchronizer circuit to ensure the integrity of these signals. Input data signal from the camera DATA_I is
considered valid when the H_REF signal is high. Data from the camera is in the form of RGB 5:6:5 format
and is split across 2 clock cycles. Down sampling from 640 pixels per horizontal line to 480 pixels per
horizontal line is achieved by skipping a pixel for every 4 pixels. Down sampling from 480 lines to 320
lines is achieved by skipping one horizontal line for every 3 lines.
3.1.2 Image Enhancement
This module performs modification on the pixel output data from the WRITE_LSRAM based on the user-
controlled data provided by the UART block. User-controlled data include contrast, brightness, and RGB
color adjustment values.
3.1.3 LCD_FSM
The LCD_FSM module reads data from the dual port RAM and sends it to the LCD display. The module
starts reading the dual port RAM when the write address in WRITE_LSRAM reaches 160. The
LCD_FSM also resets the registers of the LCD based on the V_Sync signal of the camera which
indicates the start of new frame data. LCD_FSM provides data to the LCD based on the interface
protocol.
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Microsemi Proprietary UG0891 Revision 1.0 5