Video Demo Design; Line_Write_Read Module; Figure 3 Top-Level Hardware Implementation (Video Demo); Figure 17 Flashfreeze_Sb - Microchip Technology Microsemi Hello FPGA Libero Design User Manual

Video Demo Design

3 Video Demo Design
The following figure shows the top-level video demo design in Libero.
Figure 3 • Top-Level Hardware Implementation (Video Demo)
The video demo design interfaces the Camera Sensor OV7725 and LCD with the SmartFusion2 SoC
FPGA. The design also includes the Flash*Freeze feature.
The Top module contains the following modules:
•

Line_write_read Module,

• FlashFreeze_SB Module,
• UART_interface,
• APB3_if (APB slave),
• FF_EXT,
• FF_GENERATOR,
• Mux_2_1,
• OSC_C0 IP,
3.1 Line_write_read Module
Figure 4, page 5 shows the components of the Line_read_write module. Line_write_read module
acquires the data from the OV7725 Camera sensor, performs image scaling as well as image
enhancement and sends data to LCD Screen. OV7725 camera has an array size of 640 x 480 and is
configured to operate in RGB 565 format. LCD ILI9488 has a display resolution of 480 x 320.
WRITE_LSRAM module down samples the 640x480 camera data to 480x320 LCD resolution. After
down sampling the image data goes through image enhancement that can be configured through UART.
Image Enhancement block writes the data in the Dual Port RAM. LCD_FSM reads the data from dual
port RAM and sends it to the LCD display as per the LCD interface protocol.
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Microsemi Proprietary UG0891 Revision 1.0 4