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Microchip Technology Microsemi PolarFire Manuals
Manuals and User Guides for Microchip Technology Microsemi PolarFire. We have
1
Microchip Technology Microsemi PolarFire manual available for free PDF download: Demo Manual
Microchip Technology Microsemi PolarFire Demo Manual (42 pages)
FPGA 1G Ethernet loopback Using IO CDR
Brand:
Microchip Technology
| Category:
Motherboard
| Size: 2 MB
Table of Contents
Table of Contents
3
1 Revision History
6
Revision 3.0
6
Revision 2.0
6
Revision 1.0
6
2 Polarfire FPGA 1G Ethernet Loopback Using IOD CDR
7
Design Requirements
7
Table 1 Design Requirements
7
Prerequisites
8
Demo Design
8
About PF_IOD_CDR
9
Figure 1 Block Diagram
9
Design Implementation
10
Figure 2 Top-Level Libero Implementation
10
Table 2 I/O Signals
10
IP Configuration
11
Figure 3 PF_IOD_CDR Configurator
11
Figure 4 CORETSE_0 Configurator
12
Figure 5 MI-V Configurator
13
Figure 6 Pf_Sram_0 Configurator
13
Figure 7 PF_CCC_0 Input Clock Configuration
14
Figure 8 PF_CCC_0 Output Clock Configuration
15
Figure 9 PF_IOD_CDR_CCC Configuration
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Figure 10 Corespi_0 Configurator
16
Figure 11 MI-V Processor Bus Interface Memory Map
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Figure 12 Coreahblite_0 Configuration
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Figure 13 Coreahblite_2 Configuration
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Figure 14 Coreapb3 Configuration
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Clocking Structure
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Figure 15 Clocking Structure
21
3 Libero Design Flow
22
Figure 16 Libero Design Flow Options
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Synthesize
23
Place and Route
23
PLL, DLL, and Lane Controller Placement
23
Resource Utilization
23
Verify Timing
23
Table 3 Resource Utilization
23
Generate FPGA Array Data
24
Configure Design Initialization Data and Memories
25
Figure 17 Configure Design Initialization Data and Memories Option
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Figure 18 Fabric Rams Tab
25
Generate Bitstream
26
Run PROGRAM Action
26
Figure 19 Fabric RAM Tab Apply Option
26
Table 4 Jumper Settings
26
Figure 20 Board Setup
27
4 Programming the Device Using Flashpro Express
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Figure 21 Flashpro Express Job Project
28
Figure 22 New Job Project from Flashpro Express Job
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Figure 23 Programming the Device
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Figure 24 Flashpro Express-RUN PASSED
29
5 Running the Demo
30
Figure 25 Cat Karat Packet Builder Window
30
Figure 26 Host PC Ethernet Network Connection
31
Figure 27 Interface Selection
31
Figure 28 Packet Flow and View Settings
32
Figure 29 Wireshark Main Window
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Figure 30 Wireshark Interface Settings
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Figure 31 Wireshark - Start a New Live Capture Icon
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Figure 32 Wireshark Live Capture
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Figure 33 Car Karat - Transmit Packets Icon
34
Figure 34 Transmitted and Looped Back Packets
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6 Appendix: Multi-Lane 1G IOD CDR Design
36
Figure 35 I/O Banks and PLL Placement in MPF300
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Figure 36 8 Lane 1G IOD CDR Design in Polarfire
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7 Appendix: 1G Ethernet BASE-T and BASE-X Using Transceiver
38
Ethernet BASE-T and BASE-X
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Figure 37 1G BASE-T Design
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Figure 38 1G BASE-X Design
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Transceiver Configuration
39
Transceiver Connections
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Figure 39 Transceiver Configuration
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Table 5 Table
41
Table 7 XCVR Port Connections
41
8 Appendix: References
42
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