Panasonic FP Series Programming Manual page 563

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Bit-shift instructions
F102_DSHR
The function shifts the value at output d to the right. The number of bits at output d to be shifted to
Description
the right is specified by the value assigned at input n. This shift can lie between 0 and 255 (only the
lower value byte of n is effective). Bits cleared because of the shift become 0. When input n = 0, no
shift takes place. A shifting distance larger than 32 does not make sense, since when n = 32 the
value at output d is already filled with zeros. The bit at position n - 1 (the last bit shifted out to the
right) is simultaneously stored in special internal relay R9009 (carry flag) so that it can be evaluated
accordingly. When n = 0 the content of the carry flag does not change.
31
00000000
The [n bits] are filled with 0s
This instruction also exists as a P instruction (for FP2/2SH, FP3/5, FP10/10SH PLC types), which
is only executed at the rising edge of the EN trigger. Select [Insert P instruction] from the
"Instructions" pane if you require a P instruction. To facilitate reuse, the instruction then appears
under "Recently used" in the pop-up menu. Press <Ctrl>+<Shift>+<v> within the programming
area to open the list of recently used elements.
Availability of F102_DSHR (see page 1320)
PLC types
Data types
Variable
Data type
INT
n
ANY32
d
Operands
For
WX
n
d
Error flags
No.
IEC address
%MX0.900.9
R9009
In this example, the same POU header is used for all programming languages. For an example
Example
using IL (instruction list), please refer to the online help.
562
Right shift of 32-bit data in bit units
Data
[n bits]
16 15
0
Function
number of bits to be shifted (range: 16#0 to 16#FF)
32-bit area to be shifted to the right
Relay
WY
WR
WL
SV
-
DWY
DWR
DWL
DSV
Set
for an instant
CY
The data in the nth bit
is transferred to R9009
(carry flag)
T/C
Register
EV
DT
LD
FL
DEV
DDT
DLD
DFL
If
 the bit at position n - 1 has the value 1.
Constant
dec. or hex.
-

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