Interrupt Enable Register - Epson S1C88655 Technical Manual

7.3 Interrupt Enable Register

The interrupt enable register has a 1 to 1 correspon-
dence with each interrupt factor flag and enable/
disable of interrupt requests can be set.
When "1" is written to the interrupt enable register,
an interrupt request is enabled, and is disabled
when "0" is written.
Interrupt
P27 input
P26 input
P25 input
P24 input
P23 input
P22 input
P21 input
P20 input
Timer 0 compare match
Timer 0 underflow
Timer 1 underflow
Timer 1 compare match
Timer 2 underflow
Timer 2 compare match
Timer 3 underflow
Timer 3 compare match
Timer 4 underflow
Timer 4 compare match
Timer 5 underflow
Timer 5 compare match
Timer 6 underflow
Timer 6 compare match
Timer 7 underflow
Timer 7 compare match
Serial interface 0 receiving error
Serial interface 0 receiving completion
Serial interface 0 transmitting completion
Serial interface 1 receiving error
Serial interface 1 receiving completion
Serial interface 1 transmitting completion
Clock timer 32 Hz
Clock timer 8 Hz
Clock timer 2 Hz
Clock timer 1 Hz
S1C88655 TECHNICAL MANUAL
Table 7.3.1 Interrupt enable registers and interrupt factor flags
FP27
FP26
FP25
FP24
FP23
FP22
FP21
FP20
FTC0
FTU0
FTU1
FTC1
FTU2
FTC2
FTU3
FTC3
FTU4
FTC4
FTU5
FTC5
FTU6
FTC6
FTU7
FTC7
FSERR0
FSREC0
FSTRA0
FSERR1
FSREC1
FSTRA1
FTM32
FTM8
FTM2
FTM1
7 INTERRUPT AND STANDBY STATUS
This register also permits reading, thus making it
possible to confirm that a status has been set.
At initial reset, the interrupt enable registers are set
to "0" and shifts to the interrupt disable status.
Table 7.3.1 shows the correspondence between the
interrupt enable registers and the interrupt factor
flags.
Interrupt factor flag
00FF1AH·D7
00FF1AH·D6
00FF1AH·D5
00FF1AH·D4
00FF1AH·D3
00FF1AH·D2
00FF1AH·D1
00FF1AH·D0
00FF1BH·D0
00FF1BH·D1
00FF1BH·D2
00FF1BH·D3
00FF1BH·D4
00FF1BH·D5
00FF1BH·D6
00FF1BH·D7
00FF1EH·D0
00FF1EH·D1
00FF1EH·D2
00FF1EH·D3
00FF1EH·D4
00FF1EH·D5
00FF1EH·D6
00FF1EH·D7
00FF1CH·D2
00FF1CH·D1
00FF1CH·D0
00FF1CH·D5
00FF1CH·D4
00FF1CH·D3
00FF1DH·D3
00FF1DH·D2
00FF1DH·D1
00FF1DH·D0
EPSON
Interrupt enable register
EP27 00FF14H·D7
EP26 00FF14H·D6
EP25 00FF14H·D5
EP24 00FF14H·D4
EP23 00FF14H·D3
EP22 00FF14H·D2
EP21 00FF14H·D1
EP20 00FF14H·D0
ETC0 00FF15H·D0
ETU0 00FF15H·D1
ETU1 00FF15H·D2
ETC1 00FF15H·D3
ETU2 00FF15H·D4
ETC2 00FF15H·D5
ETU3 00FF15H·D6
ETC3 00FF15H·D7
ETU4 00FF18H·D0
ETC4 00FF18H·D1
ETU5 00FF18H·D2
ETC5 00FF18H·D3
ETU6 00FF18H·D4
ETC6 00FF18H·D5
ETU7 00FF18H·D6
ETC7 00FF18H·D7
ESERR0 00FF16H·D2
ESREC0 00FF16H·D1
ESTRA0 00FF16H·D0
ESERR1 00FF16H·D5
ESREC1 00FF16H·D4
ESTRA1 00FF16H·D3
ETM32 00FF17H·D3
ETM8 00FF17H·D2
ETM2 00FF17H·D1
ETM1 00FF17H·D0
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