Epson S1C88655 Technical Manual page 14

Cmos 8-bit single chip microcomputer
Table of Contents

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1 INTRODUCTION
4 I/O PORT PULL UP RESISTOR
• P00 .........
1. With Resistor
• P01 .........
1. With Resistor
• P02 .........
1. With Resistor
• P03 .........
1. With Resistor
• P04 .........
1. With Resistor
• P05 .........
1. With Resistor
• P06 .........
1. With Resistor
• P07 .........
1. With Resistor
• P10 .........
1. With Resistor
• P11 .........
1. With Resistor
• P12 .........
1. With Resistor
• P13 .........
1. With Resistor
• P14 .........
1. With Resistor
• P15 .........
1. With Resistor
• P16 .........
1. With Resistor
• P17 .........
1. With Resistor
• P20 .........
1. With Resistor
• P21 .........
1. With Resistor
• P22 .........
1. With Resistor
• P23 .........
1. With Resistor
• P24 .........
1. With Resistor
• P25 .........
1. With Resistor
• P26 .........
1. With Resistor
• P27 .........
1. With Resistor
5 I/O PORT INPUT I/F LEVEL
• P10 .........
1. CMOS Level
• P11 .........
1. CMOS Level
• P12 .........
1. CMOS Level
• P13 .........
1. CMOS Level
• P14 .........
1. CMOS Level
• P15 .........
1. CMOS Level
• P16 .........
1. CMOS Level
• P17 .........
1. CMOS Level
• P20 .........
1. CMOS Level
• P21 .........
1. CMOS Level
• P22 .........
1. CMOS Level
• P23 .........
1. CMOS Level
• P24 .........
1. CMOS Level
• P25 .........
1. CMOS Level
• P26 .........
1. CMOS Level
• P27 .........
1. CMOS Level
6 RESET VOLTAGE DETECTOR
1. Not Use
2. Use
7 WATCHDOG TIMER OVERFLOW CYCLE
1. Not Use
2. 32768/f
(1-sec cycle when f
3. 65536/f
(2-sec cycle when f
4. 131072/f
(4-sec cycle when f
8 WATCHDOG TIMER OVERFLOW SIGNAL
1. Interrupt (NMI)
2. Reset
6
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. Gate Direct
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
2. CMOS Schmitt
OSC1
= 32 kHz)
OSC1
OSC1
= 32 kHz)
OSC1
OSC1
= 32 kHz)
OSC1
This mask option can select whether the pull-up resistor
for the I/O port terminal (it works during input mode) is
used or not. It is possible to select for each bit of the I/O
ports. Refer to Chapter 10, "I/O Ports (P Ports)", for
details.
This mask option can select the interface level of the I/O
(P) port from either the CMOS level or CMOS Schmitt
level. It is possible to select for each bit of the I/O ports.
Refer to Chapter 10, "I/O Ports (P Ports)", for details.
This mask option can select whether the built-in reset
voltage detection circuit is used or not. Refer to Section
5.1.2, "Reset voltage detector", for details.
This mask option can select a watchdog timer overflow
cycle. Refer to Chapter 14, "Watchdog Timer", for details.
This mask option can select whether the watchdog timer
overflow signal is used to generate NMI or reset. Refer to
Chapter 14, "Watchdog Timer", for details.
EPSON
S1C88655 TECHNICAL MANUAL

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