Epson S1C88655 Technical Manual page 120

13 PROGRAMMABLE TIMER
Address Bit Name
00FF8F D7 PTM77 PTM7 data D7 (MSB)
D6 PTM76
PTM7 data D6
D5 PTM75 PTM7 data D5
D4 PTM74
PTM7 data D4
D3 PTM73 PTM7 data D3
D2 PTM72
PTM7 data D2
D1 PTM71 PTM7 data D1
D0 PTM70
PTM7 data D0 (LSB)
MODE16_A: 00FF30H•D7
MODE16_B: 00FF38H•D7
MODE16_C: 00FF80H•D7
MODE16_D: 00FF88H•D7
Selects either the 8/16 bit mode.
When "1" is written: 16 bits × 1 channel
When "0" is written: 8 bits × 2 channels
Reading:
MODE16_A, MODE16_B, MODE16_C and
MODE16_D are the 8/16-bit mode selection
registers corresponding to Timers 0 and 1, Timers 2
and 3, Timers 4 and 5, and Timers 6 and 7,
respectively. Select whether Timer(L) and Timer(H)
are used as 2 channels independent 8-bit timers or
as 1 channel combined 16-bit timer.
When "0" is written to the MODE16_A (–D)
register, 8-bit × 2 channels is selected and when "1"
is written, 16-bit × 1 channel is selected.
At initial reset, this register is set to "0" (8-bit × 2
channels).
PTNREN_A: 00FF30H•D6
PTNREN_B: 00FF38H•D6
PTNREN_C: 00FF80H•D6
PTNREN_D: 00FF88H•D6
Enables/disables the noise rejector in the external
clock input circuit.
When "1" is written: Enabled
When "0" is written: Disabled
Reading:
Writing "1" to PTNREN_A (–D) enables the noise
rejector for the external clock EXCL0 (–3). The noise
rejector regards pulses less than a 16/f
in width as noise and rejects them.
When PTNREN_A (–D) is "0", the external clock
bypasses the noise rejector.
At initial reset, this register is set to "0" (disabled).
112
Table 13.9.1(h) Programmable timer control bits
Function
Valid
Valid
seconds
OSC1
1
High
CKSEL0: 00FF30H•D0
CKSEL1: 00FF31H•D0
CKSEL2: 00FF38H•D0
CKSEL3: 00FF39H•D0
CKSEL4: 00FF80H•D0
CKSEL5: 00FF81H•D0
CKSEL6: 00FF88H•D0
CKSEL7: 00FF89H•D0
Selects the input clock for each timer.
When "1" is written: External clock
When "0" is written: Internal clock
Reading:
The clock to be input to each timer is selected from
either the external clock (input signal of input
port) or the internal clock (prescaler output clock).
When "0" is written to the CKSELx register, the
internal clock (prescaler output INCLx) is selected
as the input clock for Timer x.
When "1" is written, the external clock (EXCL0
(P24 input) for Timers 0 and 1, EXCL1 (P25 input)
for Timers 2 and 3, EXCL2 (P26 input) for Timers 4
and 5, EXCL3 (P27 input) for Timers 6 and 7) is
selected and the timer functions as an event
counter.
In the 16-bit mode, the setting of the CKSEL(H)
register is invalid.
At initial reset, this register is set to "0" (internal
clock).
EPSON
0 SR R/W Comment
1 R
Low
Valid
S1C88655 TECHNICAL MANUAL