Clock Timer; Configuration Of Clock Timer; Interrupt Function - Epson S1C88655 Technical Manual

Cmos 8-bit single chip microcomputer
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12 CLOCK TIMER

12 CLOCK TIMER

12.1 Configuration of Clock Timer

The S1C88655 has built in a clock timer that uses
the OSC1 oscillation circuit as clock source. The
clock timer is composed of an 8-bit binary counter
that uses the 256 Hz signal (when f
kHz) dividing f
as its input clock and can read
OSC1
the data of each bit (128–1 Hz) by software.
Normally, this clock timer is used for various
timing functions such as clocks.
The configuration of the clock timer is shown in
Figure 12.1.1.
Note: The frequency values described in this
chapter assumes that the OSC1 oscillation
frequency (f
OSC1
not 32.768 kHz, this timer cannot be used
for clocking.
OSC1
oscillation
circuit
TMRST
TMRUN
92
= 32.768
OSC1
) is 32.768 kHz. If f
OSC1
f
256 Hz
OSC1
128
Divider
Clock timer reset
Clock timer Run/Stop
Fig. 12.1.1 Configuration of clock timer

12.2 Interrupt Function

The clock timer can generate an interrupt by each of
the 32 Hz, 8 Hz, 2 Hz and 1 Hz signals.
The configuration of the clock timer interrupt
circuit is shown in Figure 12.2.1.
Interrupts are generated by respectively setting the
corresponding interrupt factor flags FTM32, FTM8,
FTM2 and FTM1 at the falling edge of the 32 Hz, 8
Hz, 2 Hz and 1 Hz signals to "1". Interrupt can be
prohibited by the setting the interrupt enable
registers ETM32, ETM8, ETM2 and ETM1 corre-
sponding to each interrupt factor flag.
In addition, a priority level of the clock timer
interrupt for the CPU can be optionally set at levels
is
0 to 3 by the interrupt priority registers PTM0 and
PTM1.
For details on the above mentioned interrupt
control register and the operation following
generation of an interrupt, see Chapter 7, "Interrupt
and Standby Status".
The exception processing vector addresses for each
interrupt factor are respectively set as shown
below.
32 Hz interrupt: 000032H
8 Hz interrupt: 000034H
2 Hz interrupt: 000036H
1 Hz interrupt: 000038H
Figure 12.2.2 shows the timing chart for the clock
timer.
Data bus
Clock timer
TMD0–TMD7
64
32
16
8
Hz
Hz
Hz
Hz
Hz
Hz
Interrupt control circuit
EPSON
4
2
1
Hz
Hz
Interrupt
request
S1C88655 TECHNICAL MANUAL

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